build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21272 )
Change subject: soc/intel/cannonlake: Define Max PCIE Root Ports
......................................................................
Patch Set 1: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14789/ : SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59485/ : SUCCESS
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Id45ff6e96043ed71117018a4e73d08920ae9667e
Gerrit-Change-Number: 21272
Gerrit-PatchSet: 1
Gerrit-Owner: Pratikkumar V Prajapati
pratikkumar.v.prajapati@intel.com
Gerrit-Reviewer: build bot (Jenkins)
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Gerrit-Comment-Date: Tue, 29 Aug 2017 18:57:51 +0000
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