[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock

[Subrata Banik (Code Review)]

Hello Raj Astekar, Aaron Durbin, Patrick Rudolph, Angel Pons, Arthur Heymans, Ravishankar Sarawadi, build bot (Jenkins), Nico Huber, Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/36550

to look at the new patch set (#3).

Change subject: soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock
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soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock

Clone entirely from Icelake

List of changes on top off initial icelake clone
1. Replace "Icelake" with "Tigerlake"
2. Replace "icl" with "tgl"
3. Replace "icp" with "tgp"
4. Rename structure based on Icelake with Tigerlake
5. Add CPU/PCH/SA EDS docuemnt number and chapter number

Tiger Lake specific changes will follow in subsequent patches.
1. Add Tigerlake specific device IDs (CPU/PCH/SA)

"The External Design Specification (EDS) is not published yet. It comes
from an authoritative internal source.

The patch has been tested on real hardware."

Change-Id: Id7a05f4b183028550d805f02a8078ab69862a62e
Signed-off-by: Subrata Banik 
---
A src/soc/intel/tigerlake/bootblock/bootblock.c
A src/soc/intel/tigerlake/bootblock/cpu.c
A src/soc/intel/tigerlake/bootblock/pch.c
A src/soc/intel/tigerlake/bootblock/report_platform.c
4 files changed, 377 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/36550/3