[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/amenia: Configure PERST_0 pin and GNVS

[Vaibhav Shankar]

Vaibhav Shankar ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16350

-gerrit

commit 2e40d4fa7cc583d67685e4f516b1dc17b656ca3a
Author: Vaibhav Shankar 
Date:   Fri Aug 26 19:10:21 2016 -0700

mainboard/intel/amenia: Configure PERST_0 pin and GNVS

Configured  PERST_0 and assigned its address to GNVS varibale.

BUG=chrome-os-partner:55877

Change-Id: I39b4d8bba92f352ae121c7552f58480295b48aef
    Signed-off-by: Vaibhav Shankar 
---
 src/mainboard/intel/amenia/gpio.h      |  2 +-
 src/mainboard/intel/amenia/mainboard.c | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/amenia/gpio.h b/src/mainboard/intel/amenia/gpio.h
index 4a4d08f..3eb4103 100644
--- a/src/mainboard/intel/amenia/gpio.h
+++ b/src/mainboard/intel/amenia/gpio.h
@@ -223,7 +223,7 @@ static const struct pad_config gpio_table[] = {
    PAD_NC(GPIO_119, DN_20K), /* GP_SSP_2_FS0 */
    PAD_NC(GPIO_120, DN_20K), /* GP_SSP_2_FS1 */
    PAD_NC(GPIO_121, DN_20K), /* GP_SSP_2_FS2 */
-	PAD_NC(GPIO_122, DN_20K), /* GP_SSP_2_RXD */
+	PAD_CFG_GPO(GPIO_122, 0, DEEP), /* WIFI PERST_0 */
    PAD_NC(GPIO_123, DN_20K), /* GP_SSP_2_TXD */
    /** end of North West Community */
    /** North Community */
diff --git a/src/mainboard/intel/amenia/mainboard.c b/src/mainboard/intel/amenia/mainboard.c
index 6ec5b98..bbf6381 100644
--- a/src/mainboard/intel/amenia/mainboard.c
+++ b/src/mainboard/intel/amenia/mainboard.c
@@ -19,9 +19,14 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <soc/nhlt.h>
+#include <soc/nvs.h>
+#include <cbmem.h>
 #include "ec.h"
 #include "gpio.h"

+#define PERST_0         GPIO_122
+
+
 static void mainboard_init(void *chip_info)
 {
    gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
@@ -67,7 +72,26 @@ static unsigned long mainboard_write_acpi_tables(

static void mainboard_enable(device_t dev)
 {
+	global_nvs_t *gnvs;
+
    dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
+	/* assign PERST_0 address to GNVS */
+	gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS);
+
+	if (!gnvs) {
+		printk(BIOS_ERR, "PERST GNVS not located \n");
+		return;
+	}
+
+	if (!gnvs) {
+		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+		printk(BIOS_ERR, "Created GNVS for PERST \n");
+	}
+
+	if(gnvs) {
+		gnvs->prad = PAD_IOSF_MMIO(NW, PERST_0 );
+		printk(BIOS_ERR, "Assigned PERST address to GNVS \n");
+	}
 }

struct chip_operations mainboard_ops = {