[coreboot-gerrit] Change in coreboot[master]: sc7280: Increased CBFS_MCACHE size

[Ravi kumar (Code Review)]

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56196 )

Change subject: sc7280: Increased CBFS_MCACHE size
......................................................................

sc7280: Increased CBFS_MCACHE size

BUG=b:182963902
TEST=Validated on qualcomm sc7280 development board

Signed-off-by: Ravi Kumar Bokka 
Change-Id: I16c41031718e1c3e41d0a128c8b254e2f6f94093
---
M src/soc/qualcomm/sc7280/memlayout.ld
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/56196/1

diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld
index 84c5a96..57cdb59 100644
--- a/src/soc/qualcomm/sc7280/memlayout.ld
+++ b/src/soc/qualcomm/sc7280/memlayout.ld
@@ -41,9 +41,9 @@
    VBOOT2_WORK(0x1484F000, 12K)
    DMA_COHERENT(0x14853000, 8K)
    REGION(qclib_serial_log, 0x14857000, 4K, 4K)
-	REGION(ddr_information, 0x1485B000, 1K, 1K)
-	FMAP_CACHE(0x1485B400, 2K)
-	CBFS_MCACHE(0x1485BC00,8K)
+	CBFS_MCACHE(0x14858000,16K)
+	REGION(ddr_information, 0x1485C000, 1K, 1K)
+	FMAP_CACHE(0x1485C400, 2K)
    REGION(dcb, 0x1485E000, 32K, 4K)
    REGION(pmic, 0x14866000, 96K, 4K)
    REGION(ddr_training, 0x1487E000, 32K, 4K)