Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42737 )
Change subject: soc/intel/cannonlake: Add UWES ASL into xhci.asl ......................................................................
Patch Set 3:
(7 comments)
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... File src/soc/intel/cannonlake/acpi/xhci.asl:
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 29: ~0x80FE0012
symbolic constant would be nice (RO_BITS_OFF_MASK or similar)
Done
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 31: 0x6000000
symbolic constant would be nice (WAKE_ON_CONNECT_DISCONNECT_ENABLE or similar)
Done
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 70: 0x3FF
There are 12 USB2 ports listed below (compared to 10 for skylake) so I suspect this should be 0xFFF […]
Done
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 70: 0x480
symbolic constant for this would be nice (PORTSCN_OFFSET or similar)
Done
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 71: 0x540
symbolic constant for this would be nice (PORTSCXUSB3_OFFSET or similar)
Done
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 82: DVID, 16, /* VENDORID */
this is unused
Done
https://review.coreboot.org/c/coreboot/+/42737/3/src/soc/intel/cannonlake/ac... PS3, Line 88: OperationRegion (XREG, SystemMemory, : Add (ShiftLeft (XMEM, 16), 0x8000), 0x200) : Field (XREG, DWordAcc, Lock, Preserve) : { : Offset (0x1c4), /* USB2PMCTRL */ : , 2, : UPSW, 2, /* U2PSUSPGP */ : }
this whole operation region is unused
Done