[coreboot-gerrit] Change in coreboot[master]: mb/intel/jslrvp: Update SLP_Sx assertion widths and PwrCycDur

[V Sowmya (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Jamie Chen, Maulik V Vaghela, Rizwan Qureshi, Sridhar Siricilla, Krishna P Bhat D, Aamir Bohra, Karthik Ramasubramanian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43793

to look at the new patch set (#4).

Change subject: mb/intel/jslrvp: Update SLP_Sx assertion widths and PwrCycDur
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mb/intel/jslrvp: Update SLP_Sx assertion widths and PwrCycDur

This patch updates the SLP_Sx assertion widths and power cycle duration
for the Japerlake RVP.

Power cycle duration:
With default value,
     S0->S5 -> [ ~4.2 seconds delay ] -> S5->S0

With value set to 1,
     S0->S5 -> [ ~1.2 seconds delay ] -> S5->S0

BUG=b:159104150
TEST=Verified it on JSLRVP.

Change-Id: Ie2a8d959d7ebbf9c24f8c4e8d5c68b70e0ac5708
Signed-off-by: V Sowmya 
---
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
1 file changed, 14 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/43793/4