Youness Alaoui has uploaded a new change for review. ( https://review.coreboot.org/19556 )
Change subject: pciexp_device: Prevent race condition with retrain link ......................................................................
pciexp_device: Prevent race condition with retrain link
The PCIe specification[1] describes a race condition that can occur when using the Retrain Link bit in the Link Control Register. The race condition is avoided by checking the retrain link bit in the link status register and waiting until it is set to 0, before initiating a new link retraining.
[1] PCI Express Base Specification Revision 3.0 Page 633
Change-Id: I9d5840fb9a6e63838b5a4084d3bbe483f1d870ed Signed-off-by: Youness Alaoui youness.alaoui@puri.sm --- M src/device/pciexp_device.c 1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/19556/1
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 0c36538..fb2a284 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -53,6 +53,25 @@ unsigned try = PCIE_TRAIN_RETRY; u16 lnk;
+ /* Implementation note (page 633) in PCIe Specification 3.0 suggests + * polling the Link Training bit in the Link Status register until the + * value returned is 0 before setting the Retrain Link bit to 1. + * This is meant to avoid a race condition when using the + * Retrain Link mechanism. + */ + while (try--) { + lnk = pci_read_config16(dev, cap + PCI_EXP_LNKSTA); + if (!(lnk & PCI_EXP_LNKSTA_LT)) { + try = PCIE_TRAIN_RETRY; + break; + } + udelay(100); + } + if (try != PCIE_TRAIN_RETRY) { + printk(BIOS_ERR, "%s: Link Retrain timeout\n", dev_path(dev)); + return -1; + } + /* Start link retraining */ lnk = pci_read_config16(dev, cap + PCI_EXP_LNKCTL); lnk |= PCI_EXP_LNKCTL_RL;