Alex Levin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40968 )
Change subject: soc/intel/tigerlake: Clear TBT PCIe root ports BME at exit boot service
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Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40968/3/src/soc/intel/tigerlake/chi...
File src/soc/intel/tigerlake/chip.c:
https://review.coreboot.org/c/coreboot/+/40968/3/src/soc/intel/tigerlake/chi...
PS3, Line 125: reg16 = pci_read_config16(dev, PCI_COMMAND);
:
: /* Check if BME bit is enabled before */
: if ((reg16 & PCI_COMMAND_MASTER) == PCI_COMMAND_MASTER) {
: reg16 &= ~PCI_COMMAND_MASTER;
: pci_write_config16(dev, PCI_COMMAND, reg16);
: }
in terms of performance - no need to do read compare write - just write 0 to the bit.
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