Hello Frans Hendriks,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/37560
to review the following change.
Change subject: src: Conditionally include TEVT ......................................................................
src: Conditionally include TEVT
ACPI method TEVT is reported as unused when ChromeEC support is not enabled.
The TEVT code in mainboard or SoC is only enabled when an EC is used that uses this event.
The TEVT code in the EC is only enabled if the mainboard or SoC code implements TEVT.
BUG=N/A TEST=Tested on facebook monolith.
Change-Id: I8d2e14407ae2338e58797cdc7eb7d0cadf3cc26e Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/ec/acpi/Kconfig M src/ec/google/chromeec/Kconfig M src/ec/google/wilco/Kconfig M src/ec/google/wilco/acpi/dptf.asl M src/mainboard/google/cyan/acpi/dptf.asl M src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl M src/soc/intel/baytrail/acpi/dptf/thermal.asl M src/soc/intel/braswell/acpi/dptf/thermal.asl M src/soc/intel/common/acpi/dptf/thermal.asl M src/soc/intel/skylake/acpi/dptf/thermal.asl 10 files changed, 32 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/37560/1
diff --git a/src/ec/acpi/Kconfig b/src/ec/acpi/Kconfig index 3081a86..1fa707a 100644 --- a/src/ec/acpi/Kconfig +++ b/src/ec/acpi/Kconfig @@ -2,3 +2,9 @@ bool help ACPI Embedded Controller interface. Mostly found in laptops. + +config EC_SUPPORTS_DPTF_TEVT + bool + help + The EC ASL code supports calling of TEVT method when provided by + SoC or mainboard. diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 2eb3b95..0d8c7e2 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -190,3 +190,8 @@ help Enable support for Chrome OS mode switches provided by the Chrome OS EC. + +config EC_SUPPORTS_DPTF_TEVT + bool + depends on EC_GOOGLE_CHROMEEC + default y diff --git a/src/ec/google/wilco/Kconfig b/src/ec/google/wilco/Kconfig index 25d7cfa..feca2f5 100644 --- a/src/ec/google/wilco/Kconfig +++ b/src/ec/google/wilco/Kconfig @@ -49,4 +49,8 @@ with the host command and data registers to drive the EC mailbox interface. This is also the MEC EMI base address.
+config EC_SUPPORTS_DPTF_TEVT + bool + default y + endif # EC_GOOGLE_WILCO diff --git a/src/ec/google/wilco/acpi/dptf.asl b/src/ec/google/wilco/acpi/dptf.asl index 0f1663f..42fc9fd 100644 --- a/src/ec/google/wilco/acpi/dptf.asl +++ b/src/ec/google/wilco/acpi/dptf.asl @@ -115,8 +115,10 @@ /* Handle bits that are set */ While (FindSetRightBit (Local1, Local2)) { +#ifdef HAVE_THERM_EVENT_HANDLER /* DPTF will Notify sensor devices */ _SB.DPTF.TEVT (Local2) +#endif
/* Clear current sensor number */ Local1 &= ~(1 << (Local2 - 1)) diff --git a/src/mainboard/google/cyan/acpi/dptf.asl b/src/mainboard/google/cyan/acpi/dptf.asl index 70ab862..81e9fee 100644 --- a/src/mainboard/google/cyan/acpi/dptf.asl +++ b/src/mainboard/google/cyan/acpi/dptf.asl @@ -15,8 +15,6 @@ * GNU General Public License for more details. */
-#define HAVE_THERM_EVENT_HANDLER - /* Include Variant DPTF */ #include <variant/acpi/dptf.asl>
diff --git a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl index 1ff308d..77482a4 100644 --- a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl +++ b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl @@ -16,6 +16,8 @@
/* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) @@ -36,6 +38,7 @@ } #endif } +#endif
/* Thermal device initialization - Disable Aux Trip Points */ Method (TINI) diff --git a/src/soc/intel/baytrail/acpi/dptf/thermal.asl b/src/soc/intel/baytrail/acpi/dptf/thermal.asl index d84ae4b..106cd77 100644 --- a/src/soc/intel/baytrail/acpi/dptf/thermal.asl +++ b/src/soc/intel/baytrail/acpi/dptf/thermal.asl @@ -14,6 +14,8 @@
/* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) @@ -34,6 +36,7 @@ } #endif } +#endif
/* Thermal device initialization - Disable Aux Trip Points */ Method (TINI) diff --git a/src/soc/intel/braswell/acpi/dptf/thermal.asl b/src/soc/intel/braswell/acpi/dptf/thermal.asl index 1fdbea0..c993b5b 100644 --- a/src/soc/intel/braswell/acpi/dptf/thermal.asl +++ b/src/soc/intel/braswell/acpi/dptf/thermal.asl @@ -15,7 +15,9 @@ */
/* Thermal Threshold Event Handler */ -#ifdef HAVE_THERM_EVENT_HANDLER +define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) diff --git a/src/soc/intel/common/acpi/dptf/thermal.asl b/src/soc/intel/common/acpi/dptf/thermal.asl index d41f623..7058b27 100644 --- a/src/soc/intel/common/acpi/dptf/thermal.asl +++ b/src/soc/intel/common/acpi/dptf/thermal.asl @@ -16,6 +16,8 @@
/* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) @@ -41,6 +43,7 @@ } #endif } +#endif
/* Thermal device initialization - Disable Aux Trip Points */ Method (TINI) diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl index 5f3548e..742b092 100644 --- a/src/soc/intel/skylake/acpi/dptf/thermal.asl +++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl @@ -16,6 +16,8 @@
/* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) {
@@ -40,6 +42,7 @@ } #endif } +#endif
/* Thermal device initialization - Disable Aux Trip Points */ Method (TINI)