Daniel Maslowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33008
Change subject: sb/intel/lynxpoint: Fix flashconsole after lockdown ......................................................................
sb/intel/lynxpoint: Fix flashconsole after lockdown
Same as with sb/intel/bd82x6x: SMM final locks the SPI BAR, which causes flashconsole to hang. Re-init it like SMM does with CONFIG_SPI_FLASH_SMM.
Change-Id: Ie35af9610ebbba5c66351e9668e9a55cae3c7520 Signed-off-by: Daniel Maslowski dan@orangecms.org --- M src/southbridge/intel/lynxpoint/lpc.c 1 file changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/33008/1
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index b0f57c1..714c696 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -965,8 +965,16 @@ RCBA32(0x3898) = SPI_OPMENU_LOWER; RCBA32(0x389c) = SPI_OPMENU_UPPER;
- if (acpi_is_wakeup_s3() || CONFIG(INTEL_CHIPSET_LOCKDOWN)) + if (acpi_is_wakeup_s3() || CONFIG(INTEL_CHIPSET_LOCKDOWN)) { outb(APM_CNT_FINALIZE, APM_CNT); + if (CONFIG(CONSOLE_SPI_FLASH)) { + /* Re-init SPI driver to handle locked BAR. + This prevents flashconsole from hanging. + If other code needs to use SPI during + ramstage, whitelist it here. */ + spi_init(); + } + } }
static struct pci_operations pci_ops = {