Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )
Change subject: binaryPI: implement C bootblock
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Patch Set 8:
This patchset works with apu2 C bootblock change. However still can not move to SOC_AMD_COMMON_BLOCK_CAR, thus added implementation to drivers/amd/agesa/cahce_as_ram.S .
Problems with SOC_AMD_COMMON_BLOCK_CAR:
- either frozen at postcode A2
- or reset loop in AmdInitReset
Possible reasons:
- FPU and SSE initialization missing in SOC_AMD_COMMON_BLOCK_CAR path
- BSP stack setup to _ecar_stack missing in SOC_AMD_COMMON_BLOCK_CAR
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I29916a96f490ff717c69dc7cd565d74a83dbfb0d
Gerrit-Change-Number: 36914
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