Hello Patrick Rudolph, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35897
to look at the new patch set (#2).
Change subject: intel/broadwell: Implement proper backlight PWM config ......................................................................
intel/broadwell: Implement proper backlight PWM config
Port the backlight-PWM handling from Skylake instead of the previously used Haswell version. We use a 200Hz PWM signal for all boards. Which is higher than the previous devicetree value, 183Hz, but that was over- ridden by the VBIOS anyway. 200Hz is still very low, considering LED backlights, but accurate values are unknown at this time.
Lynx Point, the PCH for Haswell and Broadwell, is a transition point for the backlight-PWM config. On platforms with a PCH, we have:
o Before Lynx Point: The CPU has no PWM pin and sends the PWM duty-cycle setting to the PCH. The PCH can choose to ignore that and use its own setting (BLM_PCH_OVERRIDE_ENABLE). We use the CPU setting on these platforms. o Lynx Point + Haswell: The CPU has an additional PWM pin but can be set up to send its setting to the PCH as before. The PCH can still choose to ignore that. We use the CPU setting with Haswell. o Lynx Point + Broadwell: The CPU can't send its setting to the PCH anymore. BLM_PCH_ OVERRIDE_ENABLE must always be set(!) if the PCH PWM pin is used (it virtually always is). We have to use the PCH setting in this case. o After Lynx Point: Same as with Broadwell, only BLM_PCH_OVERRIDE_ENABLE is implied and the bit not implemented anymore.
Change-Id: I1d61d9b3f1802ebe18799fc4d06f1f1d3b54c924 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/google/auron/variants/auron_paine/devicetree.cb M src/mainboard/google/auron/variants/auron_yuna/devicetree.cb M src/mainboard/google/auron/variants/buddy/devicetree.cb M src/mainboard/google/auron/variants/gandof/devicetree.cb M src/mainboard/google/auron/variants/lulu/devicetree.cb M src/mainboard/google/auron/variants/samus/devicetree.cb M src/mainboard/purism/librem_bdw/variants/librem13v1/devicetree.cb M src/mainboard/purism/librem_bdw/variants/librem15v2/devicetree.cb M src/soc/intel/broadwell/chip.h M src/soc/intel/broadwell/igd.c 10 files changed, 49 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/35897/2