[coreboot-gerrit] [XS] Change in coreboot[main]: [WIP] soc/amd/cezanne/root_complex: use ECAM for ACPI opregion

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86652?usp=email )

Change subject: [WIP] soc/amd/cezanne/root_complex: use ECAM for ACPI opregion
......................................................................

[WIP] soc/amd/cezanne/root_complex: use ECAM for ACPI opregion

Use the ECAM MMCONF region to access the SMN index/data register pair in
the B0D0F0 device's PCI config space instead of the legacy PCI config
space access method.

Change-Id: I4de917abbc1722f7b75ceacd9e057ab5a564d48e
Signed-off-by: Felix Held 
---
M src/soc/amd/cezanne/root_complex.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/86652/1

diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c
index 875b35b..ecda302 100644
--- a/src/soc/amd/cezanne/root_complex.c
+++ b/src/soc/amd/cezanne/root_complex.c
@@ -84,7 +84,7 @@
     *	}
     *	Scope (_SB.PCI0.GNB)
     *	{
-	 *		OperationRegion(SMN, PCI_Config, 0xB8, 0x8)
+	 *		OperationRegion(SMN, SystemMemory , 0xF80000B8, 0x8)
     *		Field(SMN, AnyAcc, NoLock, Preserve) {
     *			SMNA,   32,
     *			SMND,   32,
@@ -93,7 +93,7 @@
     */
    acpi_device_write_pci_dev(device);
    acpigen_write_scope(acpi_device_path(device));
-	struct opregion opreg = OPREGION("SMN", PCI_CONFIG, 0xb8, 0x8);
+	struct opregion opreg = OPREGION("SMN", SYSTEMMEMORY, CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xb8, 0x8);
    acpigen_write_opregion(&opreg);
    static const struct fieldlist list[] = {
    	FIELDLIST_NAMESTR("SMNA", 32),