Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59315 )
Change subject: cpu/intel/model_2065x: Don't use a magic APIC ......................................................................
cpu/intel/model_2065x: Don't use a magic APIC
Move the chip configuration to the cpu cluster device.
It looks like none of the devicetree were featuring a lapic 0xacac, nor was tcc_offset ever set, so this remains a NOP.
Change-Id: I296631511b0e31b0ed43ca8193552483bdab4482 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/59315 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/cpu/intel/model_2065x/chip.h M src/cpu/intel/model_2065x/model_2065x_init.c M src/mainboard/lenovo/t410/devicetree.cb M src/mainboard/lenovo/x201/devicetree.cb M src/mainboard/packardbell/ms2290/devicetree.cb 5 files changed, 28 insertions(+), 28 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/cpu/intel/model_2065x/chip.h b/src/cpu/intel/model_2065x/chip.h index 4ee91f6..9e89793 100644 --- a/src/cpu/intel/model_2065x/chip.h +++ b/src/cpu/intel/model_2065x/chip.h @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-/* Magic value used to locate this chip in the device tree */ -#define SPEEDSTEP_APIC_MAGIC 0xACAC - struct cpu_intel_model_2065x_config { int tcc_offset; /* TCC Activation Offset */ }; diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index fc86040..389989c 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -20,18 +20,11 @@ #include <smp/node.h> #include <types.h>
-static void configure_thermal_target(void) +static void configure_thermal_target(struct device *dev) { - struct cpu_intel_model_2065x_config *conf; - struct device *lapic; + struct cpu_intel_model_2065x_config *conf = dev->bus->dev->chip_info; msr_t msr;
- /* Find pointer to CPU configuration */ - lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC); - if (!lapic || !lapic->chip_info) - return; - conf = lapic->chip_info; - /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); if ((msr.lo & (1 << 30)) && conf->tcc_offset) { @@ -101,7 +94,7 @@ configure_misc();
/* Thermal throttle activation offset */ - configure_thermal_target(); + configure_thermal_target(cpu);
/* Set Max Ratio */ set_max_ratio(); diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb index 4631b8e..200cabb 100644 --- a/src/mainboard/lenovo/t410/devicetree.cb +++ b/src/mainboard/lenovo/t410/devicetree.cb @@ -17,11 +17,8 @@ register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a"
- device cpu_cluster 0 on - ops ironlake_cpu_bus_ops - chip cpu/intel/model_2065x - device lapic 0 on end - end + chip cpu/intel/model_2065x + device cpu_cluster 0 on ops ironlake_cpu_bus_ops end end
device domain 0 on diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 73b0437..fc7c470 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -18,11 +18,8 @@ register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a"
- device cpu_cluster 0 on - ops ironlake_cpu_bus_ops - chip cpu/intel/model_2065x - device lapic 0 on end - end + chip cpu/intel/model_2065x + device cpu_cluster 0 on ops ironlake_cpu_bus_ops end end
device domain 0 on diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb index b49f4d5..db0725b 100644 --- a/src/mainboard/packardbell/ms2290/devicetree.cb +++ b/src/mainboard/packardbell/ms2290/devicetree.cb @@ -18,11 +18,8 @@ register "gpu_cpu_backlight" = "0x58d" register "gpu_pch_backlight" = "0x061a061a"
- device cpu_cluster 0 on - ops ironlake_cpu_bus_ops - chip cpu/intel/model_2065x - device lapic 0 on end - end + chip cpu/intel/model_2065x + device cpu_cluster 0 on ops ironlake_cpu_bus_ops end end
device domain 0 on