Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36418 )
Change subject: [NOT FOR MERGE]: Demo adding near_reset_vector symbol ......................................................................
[NOT FOR MERGE]: Demo adding near_reset_vector symbol
In https://review.coreboot.org/c/coreboot/+/35035/8/src/arch/x86/early_dram.ld we had a discussion about whether an approach like for RESET_VECTOR_IN_RAM could potentially be used for a bootblock that needed to grow >64KB (to keep the first 16-bit jmp within reach).
This is a mockup of the test I ran to verify that would be practical. Using this code I built a google/grunt and recorded the following with readelf. Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS ffff0000 000060 0059d0 00 AX 0 0 32 [ 2] .rel.text REL 00000000 01335c 001378 08 I 10 1 4 [ 3] .car.data NOBITS 00030000 000000 005860 00 WA 0 0 4 [ 4] .near_reset_vecto PROGBITS fffffe00 00fe60 0000bb 00 AX 0 0 4 [ 5] .rel.near_reset_v REL 00000000 0146d4 000040 08 I 10 4 4 [ 6] .reset PROGBITS fffffff0 010050 000010 00 AX 0 0 1 [ 7] .rel.reset REL 00000000 014714 000008 08 I 10 6 4 [ 8] .id PROGBITS ffffff4a 00ffaa 000036 00 A 0 0 1 [ 9] .gnu_debuglink PROGBITS 00000000 010060 000014 00 0 0 4 [10] .symtab SYMTAB 00000000 010074 001a80 10 11 243 4 [11] .strtab STRTAB 00000000 011af4 001868 00 0 0 1 [12] .shstrtab STRTAB 00000000 01471c 000064 00 0 0 1
Note, however, that I did not grow the bootblock.elf file; only inserted the section and relocated the _start16bit code.
fffffe00 <_start16bit>: fffffe00: fa cli fffffe01: 66 89 c5 mov %ax,%bp fffffe04: b0 01 mov $0x1,%al fffffe06: e6 80 out %al,$0x80 fffffe08: 66 31 c0 xor %ax,%ax fffffe0b: 0f 22 d8 mov %eax,%cr3 fffffe0e: 8c c8 mov %cs,%eax fffffe10: c1 e0 04 shl $0x4,%eax fffffe13: bb 4c fe 29 c3 mov $0xc329fe4c,%ebx fffffe18: 2e 0f 01 1f lidtl %cs:(%edi) fffffe1c: bb 44 fe 29 c3 mov $0xc329fe44,%ebx fffffe21: 2e 66 0f 01 17 lgdtw %cs:(%edi) fffffe26: 0f 20 c0 mov %cr0,%eax fffffe29: 66 25 d1 ff and $0xffd1,%ax fffffe2d: fa cli fffffe2e: 7f 66 jg fffffe96 <__protected_start+0xb> fffffe30: 0d 01 00 00 60 or $0x60000001,%eax fffffe35: 0f 22 c0 mov %eax,%cr0 fffffe38: 66 89 e8 mov %bp,%ax fffffe3b: 66 ea 8b fe ff ff ljmpw $0xffff,$0xfe8b fffffe41: 08 00 or %al,(%eax) fffffe43: 90 nop
Growing the elf should be reasonably straightforward. Right now reset16.ld has a built-in assumption of 64KB. For RESET_VECTOR_IN_RAM I've added a size symbol to Kconfig (yet to land still) for locating the reset vector and near_reset_vector at the very top, and so that the calculations are expected to match the instructions given to the PSP.
Change-Id: I6e7888c778e1d1cc426e4160543f4a4662ebf834 Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/cpu/x86/16bit/entry16.inc M src/cpu/x86/16bit/reset16.ld 2 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/36418/1
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 9e00c55..6062abd 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -37,6 +37,9 @@ .align 4096 #endif .code16 + +.section ".near_reset_vector", "ax", %progbits + .globl _start16bit .type _start16bit, @function
diff --git a/src/cpu/x86/16bit/reset16.ld b/src/cpu/x86/16bit/reset16.ld index c57cc96..31716e0 100644 --- a/src/cpu/x86/16bit/reset16.ld +++ b/src/cpu/x86/16bit/reset16.ld @@ -17,6 +17,14 @@ */
SECTIONS { + _ROMTOP = 0xfffffff0; + _NEAR_RESET_VECTOR = _ROMTOP + 0x10 - 0x200; + + . = _NEAR_RESET_VECTOR; + .near_reset_vector . : { + *(.near_reset_vector); + } + /* Trigger an error if I have an unuseable start address */ _bogus = ASSERT(_start16bit >= 0xffff0000, "_start16bit too low. Please report."); _ROMTOP = 0xfffffff0;