[coreboot-gerrit] [L] Change in coreboot[main]: intel skl mainboards: Move PcieRpEnable option below dt entries

[Nico Huber (Code Review)]

Attention is currently required from: Erik van den Bogaert, Felix Singer, Frans Hendriks, Jonathon Hall, Michał Żygowski, Piotr Król.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79958?usp=email )

Change subject: intel skl mainboards: Move PcieRpEnable option below dt entries
......................................................................

Patch Set 6:

(3 comments)

Patchset:

PS6: 
I looked through this now, and I fear this will be a lot of manual
work for next patch as I expected. So please don't merge before you
rebased the next patch and we agreed on the final state.

File src/mainboard/google/eve/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/79958/comment/3888a49c_09e098e6 :
PS6, Line 128: Enable 
Some of the comments look odd now. Maybe just remove the `Enable ` where
appropriate. You could also move the whole RP settings into their proper
place (would also avoid having to move comments and `end` keywords around
in the next patch).

File src/mainboard/protectli/vault_kbl/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/79958/comment/985c040c_f0f356fc :
PS6, Line 188: 		device ref pcie_rp1	on
`# LAN`

plus the next 5 RPs