[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Do dramc command bus training

[Xi Chen (Code Review)]

Attention is currently required from: Xi Chen, Yidi Lin.
Xi Chen has uploaded a new patch set (#56) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/44716 )

Change subject: soc/mediatek/mt8192: Do dramc command bus training
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soc/mediatek/mt8192: Do dramc command bus training

From JESD209-4C, command bus training(CBT) is needed when
changing from low frequency(FSP0) to high frequency(FSP1),
this kind of training can make higher frequency more stable.

Signed-off-by: Huayang Duan 
Signed-off-by: Xi Chen 
Change-Id: I06ee26e3b82811bffa09ab5e3e535b3174c3e3a6
---
M src/soc/mediatek/mt8192/dramc_dvfs.c
M src/soc/mediatek/mt8192/dramc_pi_basic_api.c
M src/soc/mediatek/mt8192/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8192/dramc_pi_main.c
M src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h
5 files changed, 735 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/44716/56