Hello build bot (Jenkins), Patrick Georgi, Wonkyu Kim, Duncan Laurie, Alex Levin, Shamile Khan, Prashant Malani, Angel Pons, Patrick Rudolph, Martin Roth, Caveh Jalali, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40968
to look at the new patch set (#18).
Change subject: soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master
......................................................................
soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master
This change disables Thunderbolt PCIe root ports bus master before
handing over to payload in order to mitigate the threat from the
unauthorized external DMA. In this state, the PCIe root ports would
be considered as trusted to not forward any DMA transactions to
downstream endpoint devices.
BUG=b:141609884
TEST=Verified PCIe resource has been allocated properly and USB behind
Thunderbolt dock is enumerated successfully.
Change-Id: I9650b9dd4df1f9bee53ae3737b7bf60b2ef8017b
Signed-off-by: John Zhao john.zhao@intel.com
---
M src/soc/intel/tigerlake/finalize.c
M src/soc/intel/tigerlake/include/soc/pci_devs.h
2 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/40968/18
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9650b9dd4df1f9bee53ae3737b7bf60b2ef8017b
Gerrit-Change-Number: 40968
Gerrit-PatchSet: 18
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