Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4553
-gerrit
commit 7905dbb2e6e15eb52a39f5ad122aebe33de2441a Author: Alexandru Gagniuc mr.nuke.me@gmail.com Date: Fri Dec 13 20:25:04 2013 -0600
mainboard: Add preliminary support for A10-based Cubieboard
Add a minimal infrastructure which initializes the system clocks and serial console.
Change-Id: I768ede6ccf8674ffe9fecd8925cec89768209cab Signed-off-by: Alexandru Gagniuc mr.nuke.me@gmail.com --- src/mainboard/Kconfig | 3 + src/mainboard/cubietech/Kconfig | 18 ++++++ src/mainboard/cubietech/cubieboard/Kconfig | 29 +++++++++ src/mainboard/cubietech/cubieboard/Makefile.inc | 1 + src/mainboard/cubietech/cubieboard/bootblock.c | 80 ++++++++++++++++++++++++ src/mainboard/cubietech/cubieboard/devicetree.cb | 3 + src/mainboard/cubietech/cubieboard/romstage.c | 14 +++++ 7 files changed, 148 insertions(+)
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig index fdb0eac..6ba057a 100644 --- a/src/mainboard/Kconfig +++ b/src/mainboard/Kconfig @@ -48,6 +48,8 @@ config VENDOR_BROADCOM bool "Broadcom" config VENDOR_COMPAQ bool "Compaq" +config VENDOR_CUBIETECH + bool "Cubietech" config VENDOR_DIGITALLOGIC bool "DIGITAL-LOGIC" config VENDOR_DMP @@ -161,6 +163,7 @@ source "src/mainboard/bifferos/Kconfig" source "src/mainboard/biostar/Kconfig" source "src/mainboard/broadcom/Kconfig" source "src/mainboard/compaq/Kconfig" +source "src/mainboard/cubietech/Kconfig" source "src/mainboard/digitallogic/Kconfig" source "src/mainboard/dmp/Kconfig" source "src/mainboard/eaglelion/Kconfig" diff --git a/src/mainboard/cubietech/Kconfig b/src/mainboard/cubietech/Kconfig new file mode 100644 index 0000000..840ee85 --- /dev/null +++ b/src/mainboard/cubietech/Kconfig @@ -0,0 +1,18 @@ +if VENDOR_CUBIETECH + +# Auto select common options +choice + prompt "Mainboard model" + +config BOARD_CUBIETECH_CUBIEBOARD + bool "Cubieboard" + +endchoice + +source "src/mainboard/cubietech/cubieboard/Kconfig" + +config MAINBOARD_VENDOR + string + default "Cubietech" + +endif # VENDOR_CUBIETECH diff --git a/src/mainboard/cubietech/cubieboard/Kconfig b/src/mainboard/cubietech/cubieboard/Kconfig new file mode 100644 index 0000000..72b797e --- /dev/null +++ b/src/mainboard/cubietech/cubieboard/Kconfig @@ -0,0 +1,29 @@ +if BOARD_CUBIETECH_CUBIEBOARD + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_ARMV7 + select CPU_ALLWINNER_A10 + select BOARD_ROMSIZE_KB_4096 + +config MAINBOARD_DIR + string + default cubietech/cubieboard + +config MAINBOARD_PART_NUMBER + string + default "Cubieboard A10" + +config MAX_CPUS + int + default 1 + +config BOOTBLOCK_MAINBOARD_INIT + string + default "mainboard/cubietech/cubieboard/bootblock.c" + +config DRAM_SIZE_MB + int + default 1024 + +endif # BOARD_CUBIETECH_CUBIEBOARD diff --git a/src/mainboard/cubietech/cubieboard/Makefile.inc b/src/mainboard/cubietech/cubieboard/Makefile.inc new file mode 100644 index 0000000..29763fb --- /dev/null +++ b/src/mainboard/cubietech/cubieboard/Makefile.inc @@ -0,0 +1 @@ +romstage-y += romstage.c diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c new file mode 100644 index 0000000..6e8b751 --- /dev/null +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -0,0 +1,80 @@ +/* + * Minimal bootblock for Cubieboard + * It sets up CPU clock, and enables the bootblock console. + * + * Copyright (C) 2013 Alexandru Gagniuc mr.nuke.me@gmail.com + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include <arch/io.h> +#include <uart.h> +#include <console/console.h> +#include <cpu/allwinner/a10/gpio.h> +#include <cpu/allwinner/a10/clock.h> + +#define CPU_AHB_APB0_DEFAULT \ + CPU_CLK_SRC_OSC24M \ + | APB0_DIV_1 \ + | AHB_DIV_1 \ + | AXI_DIV_1 + +#define GPB22_UART0_TX_FUNC 2 +#define GPB23_UART0_RX_FUNC 2 + +static void cubieboard_set_sys_clock(void) +{ + u32 reg32; + struct a10_ccm *ccm = (void *)A1X_CCM_BASE; + + /* Switch CPU clock to main oscillator */ + write32(CPU_AHB_APB0_DEFAULT, &ccm->cpu_ahb_apb0_cfg); + + /* Configure the PLL1. The value is the same one used by u-boot */ + write32(0xa1005000, &ccm->pll1_cfg); + + /* FIXME: Delay to wait for PLL to lock */ + u32 wait = 1000; + while (--wait); + + /* Switch CPU to PLL clock */ + reg32 = read32(&ccm->cpu_ahb_apb0_cfg); + reg32 &= ~CPU_CLK_SRC_MASK; + reg32 |= CPU_CLK_SRC_PLL1; + write32(reg32, &ccm->cpu_ahb_apb0_cfg); +} + +static void cubieboard_setup_clocks(void) +{ + struct a10_ccm *ccm = (void *)A1X_CCM_BASE; + + cubieboard_set_sys_clock(); + /* Configure the clock source for APB1. This drives our UART */ + write32(APB1_CLK_SRC_OSC24M | APB1_RAT_N(0) | APB1_RAT_M(0), + &ccm->apb1_clk_div_cfg); + +} + +static void cubieboard_setup_gpios(void) +{ + /* Mux UART pins */ + gpio_set_func(GPB, 22, GPB22_UART0_TX_FUNC); + gpio_set_func(GPB, 23, GPB23_UART0_RX_FUNC); +} + +static void cubieboard_enable_uart(void) +{ + u32 reg32; + struct a10_ccm *ccm = (void *)A1X_CCM_BASE; + /* Enable clock to UART0 */ + reg32 = read32(&ccm->apb1_gate); + reg32 |= APB1_GATE_UART(0); + write32(reg32, &ccm->apb1_gate); +} + +void bootblock_mainboard_init(void); +void bootblock_mainboard_init(void) +{ + cubieboard_setup_clocks(); + cubieboard_setup_gpios(); + cubieboard_enable_uart(); +} diff --git a/src/mainboard/cubietech/cubieboard/devicetree.cb b/src/mainboard/cubietech/cubieboard/devicetree.cb new file mode 100644 index 0000000..1358777 --- /dev/null +++ b/src/mainboard/cubietech/cubieboard/devicetree.cb @@ -0,0 +1,3 @@ +chip cpu/allwinner/a10 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c new file mode 100644 index 0000000..19192cd --- /dev/null +++ b/src/mainboard/cubietech/cubieboard/romstage.c @@ -0,0 +1,14 @@ +/* + * Placeholder for Cubieboard romstage + * + * Copyright (C) 2013 Alexandru Gagniuc mr.nuke.me@gmail.com + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include <console/console.h> + +void main(void) +{ + console_init(); + printk(BIOS_INFO, "You have managed to succesfully load romstage.\n"); +}