[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Skip FSP Notify API (post PCI enumeration)

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63693 )

Change subject: soc/intel/alderlake: Skip FSP Notify API (post PCI enumeration)
......................................................................

soc/intel/alderlake: Skip FSP Notify API (post PCI enumeration)

Alder Lake SoC deselects USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM Kconfig
to skip FSP notify API (Post PCI Enumeration) and make use of native
coreboot driver to perform SoC recommended operations prior booting to
payload/OS.

BUG=b:211954778
TEST=Able to build brya with these changes and coreboot log with this
code change as below when ADL SoC selects required configs.
[INFO ]  coreboot skipped calling FSP notify phase: 00000020.

Signed-off-by: Subrata Banik 
Change-Id: I46f6ca791fb60b417d205d0a54705f3481deebd4
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/63693/1

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 35fd2f7..9bc0a46 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -117,7 +117,6 @@
    select TSC_MONOTONIC_TIMER
    select UDELAY_TSC
    select UDK_202005_BINDING
-	select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM

config ALDERLAKE_CONFIGURE_DESCRIPTOR
    bool