Julien Viard de Galbert has uploaded this change for review. ( https://review.coreboot.org/25444
Change subject: soc/intel/denverton + mb: Change UART IRQ line in conflict with ME ......................................................................
soc/intel/denverton + mb: Change UART IRQ line in conflict with ME
Change the UART IRQ line from A/16 to G/22
The IRQ conflict was trigered by using the tools spsInfo or spsManuf.
Change-Id: I0c59ff80ef19b54c2de1a6a8205afe6482adfdff Signed-off-by: Julien Viard de Galbert jviarddegalbert@online.net --- M src/mainboard/intel/harcuvar/devicetree.cb M src/mainboard/scaleway/tagada/devicetree.cb M src/soc/intel/denverton_ns/acpi/lpc.asl 3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/25444/1
diff --git a/src/mainboard/intel/harcuvar/devicetree.cb b/src/mainboard/intel/harcuvar/devicetree.cb index 7fce211..e6c4aa2 100644 --- a/src/mainboard/intel/harcuvar/devicetree.cb +++ b/src/mainboard/intel/harcuvar/devicetree.cb @@ -35,7 +35,7 @@ register "ir07_routing" = "0x3210" # IR07, Dev9/10/11/12 register "ir08_routing" = "0x7654" # IR08, Dev14/15/16/17 register "ir09_routing" = "0x3213" # IR09, Dev21 - register "ir10_routing" = "0x3210" # IR10, Dev26/18 + register "ir10_routing" = "0x3216" # IR10, Dev26/18 register "ir11_routing" = "0x3215" # IR11, Dev20 register "ir12_routing" = "0x3210" # IR12, Dev27 # configure interrupt polarity control diff --git a/src/mainboard/scaleway/tagada/devicetree.cb b/src/mainboard/scaleway/tagada/devicetree.cb index acf56a0..f878e95 100644 --- a/src/mainboard/scaleway/tagada/devicetree.cb +++ b/src/mainboard/scaleway/tagada/devicetree.cb @@ -35,7 +35,7 @@ register "ir07_routing" = "0x3210" # IR07, Dev9/10/11/12 register "ir08_routing" = "0x7654" # IR08, Dev14/15/16/17 register "ir09_routing" = "0x3213" # IR09, Dev21 - register "ir10_routing" = "0x3210" # IR10, Dev26/18 + register "ir10_routing" = "0x3216" # IR10, Dev26/18 register "ir11_routing" = "0x3215" # IR11, Dev20 register "ir12_routing" = "0x3210" # IR12, Dev27 # configure interrupt polarity control diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl index 262ac55..4ae3c35 100644 --- a/src/soc/intel/denverton_ns/acpi/lpc.asl +++ b/src/soc/intel/denverton_ns/acpi/lpc.asl @@ -153,7 +153,7 @@ Name(BUF0,ResourceTemplate() { IO(Decode16,0x03F8,0x03F8,0x01,0x08) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {22} })
Return(BUF0)