Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35225 )
Change subject: soc/intel/common/block/cse: Move me_read_config32() to common code ......................................................................
Patch Set 7:
(26 comments)
https://review.coreboot.org/c/coreboot/+/35225/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35225/2//COMMIT_MSG@12 PS2, Line 12: * Fix all indentation comments
not required, the gerrit patchset history knows what you have done with the patch
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/apollolake/cs... File src/soc/intel/apollolake/cse.c:
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/apollolake/cs... PS1, Line 46:
use tab ?
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 516: if (!CONFIG(CONSOLE_SERIAL))
that open brace { should be on the previous line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 520: if( offset == PCI_ME_HFSTS1)
space prohibited after that open parenthesis '('
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 520: if( offset == PCI_ME_HFSTS1)
space required before the open parenthesis '('
Done
https://review.coreboot.org/c/coreboot/+/35225/2/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/35225/2/src/soc/intel/common/block/... PS2, Line 518: index = 1
you could create some static structure to refer offset and index to avoid such big if/else if logic
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 511: if (offset == PCI_ME_HFSTS1) {
braces {} are not necessary for any arm of this statement
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 514: else if (offset == PCI_ME_HFSTS2) {
else should follow close brace '}'
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 517: else if (offset == PCI_ME_HFSTS3) {
else should follow close brace '}'
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 523: else if (offset == PCI_ME_HFSTS5) {
else should follow close brace '}'
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 526: else if (offset == PCI_ME_HFSTS6) {
else should follow close brace '}'
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 529: else {
else should follow close brace '}'
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 533: if (index != 0) {
braces {} are not necessary for any arm of this statement
Done
https://review.coreboot.org/c/coreboot/+/35225/5/src/soc/intel/common/block/... PS5, Line 546: if (!CONFIG(CONSOLE_SERIAL)) {
braces {} are not necessary for single statement blocks
Done
https://review.coreboot.org/c/coreboot/+/35225/2/src/soc/intel/common/block/... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/35225/2/src/soc/intel/common/block/... PS2, Line 62:
remove tab
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 67: PCI_ME_HFSTS1 = 0x40,
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 67: PCI_ME_HFSTS1 = 0x40,
code indent should use tabs where possible
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 68: PCI_ME_HFSTS2 = 0x48,
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 68: PCI_ME_HFSTS2 = 0x48,
code indent should use tabs where possible
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 69: PCI_ME_HFSTS3 = 0x60,
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 69: PCI_ME_HFSTS3 = 0x60,
code indent should use tabs where possible
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 70: PCI_ME_HFSTS4 = 0x64,
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 71: PCI_ME_HFSTS5 = 0x68,
code indent should use tabs where possible
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 71: PCI_ME_HFSTS5 = 0x68,
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 72: PCI_ME_HFSTS6 = 0x6C,
please, no spaces at the start of a line
Done
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 72: PCI_ME_HFSTS6 = 0x6C,
code indent should use tabs where possible
Done