[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/apollolake: Override GLK usb clock gating register

[John Zhao (Code Review)]

John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30918 )

Change subject: soc/intel/apollolake: Override GLK usb clock gating register
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Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/30918/2/src/soc/intel/apollolake/chip.c 
File src/soc/intel/apollolake/chip.c:

https://review.coreboot.org/#/c/30918/2/src/soc/intel/apollolake/chip.c@776 
PS2, Line 776: 			reg = 0x0FCE6E5F;
> We just slam in these settings?

It was determined 0x0FCE6E5F would be the right value for usb clock gating register. It could be either implemented at fsp or override by coreboot, which would reflect the same effect. After updating the value, b:12056309 shows it helps to mitigate suspend/resume failure.