Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34137 )
Change subject: soc/intel/common/lpss: Add function to check for a LPSS controller ......................................................................
soc/intel/common/lpss: Add function to check for a LPSS controller
Add an API to check if device is a LPSS controller. This API can be used for IRQ assignments for LPSS PCI controllers, since the LPSS controllers have a requirement of unique IRQ assignments and do not share same IRQ# with other LPSS controllers.
SOC code is reponsible to provide list of the LPSS controllers supported and needs to implement soc_lpss_controllers_list API, in case it needs to use this common implementation.
Change-Id: I3f5bb268fc581280bb1b87b6b175a0299a24a44a Signed-off-by: Aamir Bohra aamir.bohra@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34137 Reviewed-by: Paul Fagerburg pfagerburg@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/include/intelblocks/lpss.h M src/soc/intel/common/block/lpss/lpss.c 2 files changed, 27 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved Paul Fagerburg: Looks good to me, approved
diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h index dafe351..e80f3dd 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpss.h +++ b/src/soc/intel/common/block/include/intelblocks/lpss.h @@ -40,4 +40,13 @@ /* Set controller power state to D0 or D3*/ void lpss_set_power_state(const struct device *dev, enum lpss_pwr_state state);
+/* + * Handler to get list of LPSS controllers. The SOC is expected to send out a + * list of pci devfn for all LPSS controllers supported by the SOC. + */ +const pci_devfn_t *soc_lpss_controllers_list(size_t *size); + +/* Check if the device is a LPSS controller */ +bool is_dev_lpss(const struct device *dev); + #endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */ diff --git a/src/soc/intel/common/block/lpss/lpss.c b/src/soc/intel/common/block/lpss/lpss.c index a519bf6..1722dcd 100644 --- a/src/soc/intel/common/block/lpss/lpss.c +++ b/src/soc/intel/common/block/lpss/lpss.c @@ -89,3 +89,21 @@
pci_update_config8(lpss_dev, PME_CTRL_STATUS, ~POWER_STATE_MASK, state); } + +bool is_dev_lpss(const struct device *dev) +{ + static size_t size; + static const pci_devfn_t *lpss_devices; + + if (dev->path.type != DEVICE_PATH_PCI) + return false; + + if (!lpss_devices) + lpss_devices = soc_lpss_controllers_list(&size); + + for (int i = 0; i < size; i++) { + if (lpss_devices[i] == dev->path.pci.devfn) + return true; + } + return false; +}