Hello Raj Astekar, Aaron Durbin, Patrick Rudolph, Angel Pons, Arthur Heymans, Ravishankar Sarawadi, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36550
to look at the new patch set (#4).
Change subject: soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock ......................................................................
soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock
Clone entirely from Icelake
List of changes on top off initial icelake clone 1. Replace "Icelake" with "Tigerlake" 2. Replace "icl" with "tgl" 3. Replace "icp" with "tgp" 4. Rename structure based on Icelake with Tigerlake 5. Add CPU/PCH/SA EDS document number and chapter number 6. Add required headers into include/soc/ from ICL directory
Tiger Lake specific changes will follow in subsequent patches. 1. Add Tigerlake specific device IDs (CPU/PCH/SA)
"The External Design Specification (EDS) is not published yet. It comes from an authoritative internal source.
The patch has been tested on real hardware."
Change-Id: Id7a05f4b183028550d805f02a8078ab69862a62e Signed-off-by: Subrata Banik subrata.banik@intel.com --- A src/soc/intel/tigerlake/bootblock/bootblock.c A src/soc/intel/tigerlake/bootblock/cpu.c A src/soc/intel/tigerlake/bootblock/pch.c A src/soc/intel/tigerlake/bootblock/report_platform.c A src/soc/intel/tigerlake/include/soc/bootblock.h A src/soc/intel/tigerlake/include/soc/espi.h A src/soc/intel/tigerlake/include/soc/iomap.h A src/soc/intel/tigerlake/include/soc/p2sb.h A src/soc/intel/tigerlake/include/soc/pch.h A src/soc/intel/tigerlake/include/soc/pci_devs.h A src/soc/intel/tigerlake/include/soc/pcr_ids.h A src/soc/intel/tigerlake/include/soc/pm.h A src/soc/intel/tigerlake/include/soc/smbus.h 13 files changed, 1,082 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/36550/4