Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31194
Change subject: intel/apollolake: Add parameter to enable VTD in devicetree ......................................................................
intel/apollolake: Add parameter to enable VTD in devicetree
The FSP has a parameter to enable or disable the VTD feature. VTD is disabled per default. Add a chip parameter so that VTD can be enabled on mainboard level in devicetree.
Change-Id: Ic0bfcf1719e1ccc678a932bf3d38c6dbce3556bc Signed-off-by: Werner Zeh werner.zeh@siemens.com --- M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/chip.h 2 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/31194/1
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index cddfe44..735fed0 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -751,6 +751,9 @@ if (!xdci_can_enable()) dev->enabled = 0; silconfig->UsbOtg = dev->enabled; + + /* Set VTD feature according to devicetree */ + silconfig->VtdEnable = cfg->enable_vtd; }
struct chip_operations soc_intel_apollolake_ops = { diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 6c2404a..b9e368c 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -188,6 +188,12 @@ * 00=1.10v, 01=1.15v, 10=1.24v, 11=1.20v (default). */ uint32_t PmicVdd2Voltage; + + /* Option to enable VTD feature. Default is 0 which disables VTD + * capability in FSP. Setting this option to 1 in devicetree will enable + * the Upd parameter VtdEnable. + */ + uint8_t enable_vtd; };
typedef struct soc_intel_apollolake_config config_t;