[coreboot-gerrit] [M] Change in coreboot[master]: soc/amd/morgana: Add 32M support

[Bao Zheng (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held.

Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69150 )

Change subject: soc/amd/morgana: Add 32M support
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Patch Set 5:

(1 comment)

Patchset:

PS4:
> This change makes so many assumptions about how things are going to work, and breaks so many current […]

So where should the AMDFW and coreboot be located for Birman?
The AMDFW should be at relative 0x20000, which is defined by HW. So it should be at bottom 16M. The coreboot stages should be upper 16M, otherwise the running address pointer and data loading don't have the correct address.
So how is the amdfw "inside" CBFS?