build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30934 )
Change subject: qualcomm/qcs405: enable SPI bus 4 for TPM ......................................................................
Patch Set 8:
(8 comments)
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c File src/soc/qualcomm/qcs405/spi.c:
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@353 PS8, Line 353: gpio_configure(GPIO(37), 2, GPIO_PULL_DOWN, GPIO_6MA, GPIO_INPUT); // MOSI line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@354 PS8, Line 354: gpio_configure(GPIO(38), 2, GPIO_PULL_DOWN, GPIO_6MA, GPIO_OUTPUT); // MISO line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@355 PS8, Line 355: gpio_configure(GPIO(117), 2, GPIO_NO_PULL, GPIO_6MA, GPIO_OUTPUT);// CS line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@356 PS8, Line 356: gpio_configure(GPIO(118), 2, GPIO_PULL_DOWN, GPIO_6MA, GPIO_OUTPUT);// CLK line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@359 PS8, Line 359: gpio_configure(GPIO(26), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); // MOSI line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@360 PS8, Line 360: gpio_configure(GPIO(27), 3, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); // MISO line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@361 PS8, Line 361: gpio_configure(GPIO(28), 4, GPIO_PULL_UP, GPIO_16MA, GPIO_INPUT); // CS line over 80 characters
https://review.coreboot.org/#/c/30934/8/src/soc/qualcomm/qcs405/spi.c@362 PS8, Line 362: gpio_configure(GPIO(29), 4, GPIO_NO_PULL, GPIO_16MA, GPIO_INPUT); // CLK line over 80 characters