Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35241 )
Change subject: mb/google/drallion: dynamic disable memory channel ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35241/2/src/mainboard/google/dralli... File src/mainboard/google/drallion/romstage.c:
https://review.coreboot.org/c/coreboot/+/35241/2/src/mainboard/google/dralli... PS2, Line 65: DisableDimmChannel0
I means this is Drallion feature only, and I didn't know why this need based on read_type? This proj […]
I meant something like this:
diff --git a/src/soc/intel/cannonlake/cnl_memcfg_init.c b/src/soc/intel/cannonlake/cnl_memcfg_init.c index 6c551ad563..894bcfe2e5 100644 --- a/src/soc/intel/cannonlake/cnl_memcfg_init.c +++ b/src/soc/intel/cannonlake/cnl_memcfg_init.c @@ -134,6 +134,10 @@ void cannonlake_memcfg_init(FSP_M_CONFIG *mem_cfg, spdi = &(cnl_cfg->spd[i]); switch (spdi->read_type) { case NOT_EXISTING: + if ((i == 0) || (i == 1)) + mem_cfg->DisableDimmChannel0 = 1 << i; + else + mem_cfg->DisableDimmChannel1 = 1 << (i % 2); break; case READ_SMBUS: mem_cfg->SpdAddressTable[i] =