Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36990 )
Change subject: soc/mediatek/mt8183: Use DDR clock to compute Tx delay cell ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36990/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36990/4//COMMIT_MSG@15 PS4, Line 15: Signed-off-by: Huayang Duan huayang.duan@mediatek.com Move this line below Change-Id.
https://review.coreboot.org/c/coreboot/+/36990/4/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36990/4/src/soc/mediatek/mt8183/dra... PS4, Line 1593: for to