[coreboot-gerrit] [L] Change in coreboot[main]: mb/asrock: Add Z87 Extreme4 (Haswell)

[Jan Philipp Groß (Code Review)]

Attention is currently required from: Angel Pons, Keith Hui, Máté Kukri, Nicholas Chin.

Jan Philipp Groß has posted comments on this change by Jan Philipp Groß. ( https://review.coreboot.org/c/coreboot/+/84672?usp=email )

Change subject: mb/asrock: Add Z87 Extreme4 (Haswell)
......................................................................

Patch Set 9:

(2 comments)

This change is ready for review.

File src/mainboard/asrock/z87_extreme4/Kconfig:

https://review.coreboot.org/c/coreboot/+/84672/comment/8264658a_c7d3f5dd?usp... :
PS1, Line 28: config USBDEBUG_HCD_INDEX # FIXME: check this
            : 	int
            : 	default 2
> Let's leave it as-is.

Both debug ports are now accounted for.

File src/mainboard/asrock/z87_extreme4/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/84672/comment/ac4170e2_eed5e982?usp... :
PS1, Line 54: device pci 1c.0 on	 # PCIe Port #1
            : 				subsystemid 0x1849 0x8c10
            : 			end
            : 			device pci 1c.1 on	 # PCIe Port #2
            : 			end
            : 			device pci 1c.2 on	 # PCIe Port #3
            : 				subsystemid 0x1849 0x8c14
            : 			end
            : 			device pci 1c.3 on	 # RP #4: PCIe x1 slot
            : 			end
            : 			device pci 1c.4 on	 # PCIe Port #5
            : 			end
            : 			device pci 1c.5 on	 # PCIe Port #6
            : 			end
            : 			device pci 1c.6 on	 # PCIe Port #7
            : 			end
            : 			device pci 1c.7 on	 # PCIe Port #8
            : 			end
> Have a look at the PCIe RPs now. […]

Done