Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39445 )
Change subject: soc/intel/tigerlake: Fix PCI interrupts for D31 ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39445/2/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pci_irqs_tgl.asl:
https://review.coreboot.org/c/coreboot/+/39445/2/src/soc/intel/tigerlake/acp... PS2, Line 22: Package(){0x001FFFFF, 4, 0, SMBUS_IRQ }, : Package(){0x001FFFFF, 7, 0, TRACEHUB_IRQ }, Why were these removed?
https://review.coreboot.org/c/coreboot/+/39445/2/src/soc/intel/tigerlake/acp... PS2, Line 21: Package(){0x001FFFFF, 0, 0, eSPI_IRQ }, : Package(){0x001FFFFF, 1, 0, P2SB_IRQ }, : Package(){0x001FFFFF, 2, 0, PMC_IRQ }, As per https://github.com/otcshare/CCG-TGL-Generic-SiC/blob/master/ClientOneSilicon..., it looks like eSPI, P2SB and PMC don't use interrupts.
https://review.coreboot.org/c/coreboot/+/39445/2/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/irq_tgl.h:
https://review.coreboot.org/c/coreboot/+/39445/2/src/soc/intel/tigerlake/inc... PS2, Line 42: #define HDA_IRQ 19 Did you verify interrupts work correctly for HDA? It looks like this is different than what is seen in FSP: https://github.com/otcshare/CCG-TGL-Generic-SiC/blob/master/ClientOneSilicon...