[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Support to initialize Memory

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39847 )

Change subject: soc/intel/tigerlake: Support to initialize Memory
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39847/1/src/soc/intel/tigerlake/inc... 
File src/soc/intel/tigerlake/include/soc/meminit_tgl.h:

https://review.coreboot.org/c/coreboot/+/39847/1/src/soc/intel/tigerlake/inc... 
PS1, Line 71: dq_pins_interleaved
> Is the new structure required?. […]

Yes, I think its required. It allows keeping the interface cleaner as to what the expectations are w.r.t. different memory type initialization.