10 Dec
2020
10 Dec
'20
6:30 p.m.
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48251 )
Change subject: soc/intel/common/block/lpc: Include correct acpi.h ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48251/3/src/soc/intel/common/block/... File src/soc/intel/common/block/lpc/lpc.c:
https://review.coreboot.org/c/coreboot/+/48251/3/src/soc/intel/common/block/... PS3, Line 14: <soc/acpi.h>
Sure. I don't want to block you on this. […]
I'll try to update the patch to move the define for southbridge_write_acpi_tables() to lpc.h. It looks like it will mess it up more.
Since there isn't a single southbridge device, LPC make sense as the default to use.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I0590a028b11f34e423d8f0007e0653037b0849a0
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