[coreboot-gerrit] Change in ...coreboot[master]: soc/{amd,intel}/chip: Use local include for chip.h

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32014

Change subject: soc/{amd,intel}/chip: Use local include for chip.h
......................................................................

soc/{amd,intel}/chip: Use local include for chip.h

Change-Id: Ic1fcbf4b54b7d0b5cda04ca9f7fc145050c867b8
Signed-off-by: Elyes HAOUAS 
---
M src/soc/amd/stoneyridge/chip.c
M src/soc/intel/braswell/chip.c
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/fsp_broadwell_de/chip.c
M src/soc/intel/icelake/chip.c
M src/soc/intel/skylake/chip.c
6 files changed, 12 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32014/1

diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 1bd8cbf..5c2a58b 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */

-#include <chip.h>
 #include <bootstate.h>
 #include <console/console.h>
 #include <cpu/amd/mtrr.h>
@@ -30,6 +29,8 @@
 #include <amdblocks/agesawrapper.h>
 #include <amdblocks/agesawrapper_call.h>

+#include "chip.h"
+
 /* Supplied by i2c.c */
 extern struct device_operations stoneyridge_i2c_mmio_ops;
 extern const char *i2c_acpi_name(const struct device *dev);
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index e8fd9d1..dbf697d 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */

-#include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -23,6 +22,8 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

+#include "chip.h"
+
 static void pci_domain_set_resources(struct device *dev)
 {
    printk(BIOS_SPEW, "%s/%s (%s)\n",
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index d50c689..8df0aa7 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */

-#include <chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <fsp/api.h>
@@ -28,6 +27,8 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

+#include "chip.h"
+
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)
 {
diff --git a/src/soc/intel/fsp_broadwell_de/chip.c b/src/soc/intel/fsp_broadwell_de/chip.c
index 6b14845..1711e3a 100644
--- a/src/soc/intel/fsp_broadwell_de/chip.c
+++ b/src/soc/intel/fsp_broadwell_de/chip.c
@@ -22,7 +22,8 @@
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
-#include <chip.h>
+
+#include "chip.h"

static void pci_domain_set_resources(struct device *dev)
 {
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index 0e4388e..e275fd2 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */

-#include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -29,6 +28,8 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

+#include "chip.h"
+
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)
 {
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 98e5baf..fa2e0fb 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -15,7 +15,6 @@
  */

#include <arch/acpi.h>
-#include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -33,6 +32,8 @@
 #include <soc/ramstage.h>
 #include <string.h>

+#include "chip.h"
+
 void soc_init_pre_device(void *chip_info)
 {
    /* Snapshot the current GPIO IRQ polarities. FSP is setting a