[coreboot-gerrit] Change in coreboot[master]: cpu/x86/sipi_vector.S: Use correct suffix for bts

[Jacob Garber (Code Review)]

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46928 )

Change subject: cpu/x86/sipi_vector.S: Use correct suffix for bts
......................................................................

cpu/x86/sipi_vector.S: Use correct suffix for bts

The assembler is warning that the bts instruction is ambiguous, so use
the correct suffix btsl.  See also commit 693315160e
(cpu/x86/sipi_vector.S: Use correct op suffix)

Signed-off-by: Jacob Garber 
Change-Id: I2eded0af1258e90926009544683b23961d99887b
---
M src/cpu/x86/sipi_vector.S
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/46928/1

diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S
index ba1ecb7..054f30d 100644
--- a/src/cpu/x86/sipi_vector.S
+++ b/src/cpu/x86/sipi_vector.S
@@ -121,7 +121,7 @@

/* Protect microcode loading. */
 lock_microcode:
-	lock bts $0, microcode_lock
+	lock btsl $0, microcode_lock
    jc	lock_microcode

load_microcode: