[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell: Relocate southbridge .c files

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41929

to look at the new patch set (#12).

Change subject: soc/intel/broadwell: Relocate southbridge .c files
......................................................................

soc/intel/broadwell: Relocate southbridge .c files

Move Broadwell southbridge source code files under the southbridge
scope. The PCH that Broadwell is paired with is called Wildcat Point.

Note that headers and Kconfig still reside inside the soc namespace.
This is temporary and will be accounted for in subsequent commits.

Change-Id: Ia2831c24314f685fc1f7f4993efa23e9bb025f24
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/Makefile.inc
D src/soc/intel/broadwell/romstage/Makefile.inc
A src/southbridge/intel/wildcatpoint/Makefile.inc
R src/southbridge/intel/wildcatpoint/adsp.c
R src/southbridge/intel/wildcatpoint/bootblock.c
R src/southbridge/intel/wildcatpoint/early_pch.c
R src/southbridge/intel/wildcatpoint/early_smbus.c
R src/southbridge/intel/wildcatpoint/ehci.c
R src/southbridge/intel/wildcatpoint/elog.c
R src/southbridge/intel/wildcatpoint/gpio.c
R src/southbridge/intel/wildcatpoint/hda.c
R src/southbridge/intel/wildcatpoint/iobp.c
R src/southbridge/intel/wildcatpoint/lpc.c
R src/southbridge/intel/wildcatpoint/me.c
R src/southbridge/intel/wildcatpoint/me_status.c
R src/southbridge/intel/wildcatpoint/pch.c
R src/southbridge/intel/wildcatpoint/pcie.c
R src/southbridge/intel/wildcatpoint/pmutil.c
R src/southbridge/intel/wildcatpoint/power_state.c
R src/southbridge/intel/wildcatpoint/ramstage.c
R src/southbridge/intel/wildcatpoint/sata.c
R src/southbridge/intel/wildcatpoint/serialio.c
R src/southbridge/intel/wildcatpoint/smbus.c
R src/southbridge/intel/wildcatpoint/smi.c
R src/southbridge/intel/wildcatpoint/smihandler.c
R src/southbridge/intel/wildcatpoint/uart.c
R src/southbridge/intel/wildcatpoint/usb_debug.c
R src/southbridge/intel/wildcatpoint/xhci.c
28 files changed, 42 insertions(+), 42 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41929/12