Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33770 )
Change subject: soc/amd/picasso: Update southbridge ......................................................................
Patch Set 14:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33770/13/src/soc/amd/picasso/includ... File src/soc/amd/picasso/include/soc/southbridge.h:
https://review.coreboot.org/c/coreboot/+/33770/13/src/soc/amd/picasso/includ... PS13, Line 169: #define GPP_CLK_REQ_MAP_CLK6 (1 << GPP_CLK6_REQ_SHL)
Mask values are overlapping, is it on purpose? […]
Good catch. I missed that the fields narrowed. Oh, the newer PPR shows different names now too.
https://review.coreboot.org/c/coreboot/+/33770/13/src/soc/amd/picasso/includ... PS13, Line 229: 0x5b
This sounds strange, normally it's a pair with STATE being the second register... […]
You're right. I'm completely tired of the way our AOAC was written, and the BKDG and PPR don't specify them in the same fashion. Redoing it with https://review.coreboot.org/q/Iffc87f39ebe38394a56d41bb0940e9701fd05db9