[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48423 )

Change subject: soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP
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Patch Set 4:

(2 comments)

https://review.coreboot.org/c/coreboot/+/48423/3/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/48423/3/src/soc/intel/common/block/... 
PS3, Line 680: 	if (region_device_sz(target_rdev) < cse_blob_sz)
> It would be helpful to have an error print in this case indicating the sizes: […]

Ack

https://review.coreboot.org/c/coreboot/+/48423/3/src/soc/intel/common/block/... 
PS3, Line 681: CSE_LITE_SKU_LAYOUT_MISMATCH_ERROR
> I would really like to catch this error at build time instead of waiting until runtime to know that  […]

I have raised crosbug(B:175304872) to track the changes.