Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46998 )
Change subject: broadwell: Simplify `mainboard_post_raminit` callback ......................................................................
broadwell: Simplify `mainboard_post_raminit` callback
Prepare to ditch romstage_params. The only thing that mainboards care about is whether the current boot is a resume from S3, and nothing else.
Change-Id: I703d9a1bfa1d3229b55f3a7ee9ec2f210fc9495e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/auron/variants/auron_paine/variant.c M src/mainboard/google/auron/variants/auron_yuna/variant.c M src/mainboard/google/auron/variants/buddy/pei_data.c M src/mainboard/google/auron/variants/gandof/variant.c M src/mainboard/google/auron/variants/lulu/variant.c M src/mainboard/google/auron/variants/samus/variant.c M src/mainboard/google/jecht/romstage.c M src/mainboard/intel/wtm2/romstage.c M src/mainboard/purism/librem_bdw/romstage.c M src/soc/intel/broadwell/romstage.c M src/soc/intel/broadwell/romstage.h 11 files changed, 18 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/46998/1
diff --git a/src/mainboard/google/auron/variants/auron_paine/variant.c b/src/mainboard/google/auron/variants/auron_paine/variant.c index d925f9f..15b082e 100644 --- a/src/mainboard/google/auron/variants/auron_paine/variant.c +++ b/src/mainboard/google/auron/variants/auron_paine/variant.c @@ -22,6 +22,6 @@ return len; }
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { } diff --git a/src/mainboard/google/auron/variants/auron_yuna/variant.c b/src/mainboard/google/auron/variants/auron_yuna/variant.c index d925f9f..15b082e 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/variant.c +++ b/src/mainboard/google/auron/variants/auron_yuna/variant.c @@ -22,6 +22,6 @@ return len; }
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { } diff --git a/src/mainboard/google/auron/variants/buddy/pei_data.c b/src/mainboard/google/auron/variants/buddy/pei_data.c index b4135bd..b52ca6f 100644 --- a/src/mainboard/google/auron/variants/buddy/pei_data.c +++ b/src/mainboard/google/auron/variants/buddy/pei_data.c @@ -43,6 +43,6 @@ pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0); }
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { } diff --git a/src/mainboard/google/auron/variants/gandof/variant.c b/src/mainboard/google/auron/variants/gandof/variant.c index 4ebab64..5bdb1d2 100644 --- a/src/mainboard/google/auron/variants/gandof/variant.c +++ b/src/mainboard/google/auron/variants/gandof/variant.c @@ -24,8 +24,8 @@ return len; }
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { - if (rp->power_state->prev_sleep_state != ACPI_S3) + if (!s3resume) google_chromeec_kbbacklight(75); } diff --git a/src/mainboard/google/auron/variants/lulu/variant.c b/src/mainboard/google/auron/variants/lulu/variant.c index 9a60933..8bd34fc 100644 --- a/src/mainboard/google/auron/variants/lulu/variant.c +++ b/src/mainboard/google/auron/variants/lulu/variant.c @@ -34,8 +34,8 @@ return len; }
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { - if (rp->power_state->prev_sleep_state != ACPI_S3) + if (!s3resume) google_chromeec_kbbacklight(75); } diff --git a/src/mainboard/google/auron/variants/samus/variant.c b/src/mainboard/google/auron/variants/samus/variant.c index 6d80949..9852f1f 100644 --- a/src/mainboard/google/auron/variants/samus/variant.c +++ b/src/mainboard/google/auron/variants/samus/variant.c @@ -21,9 +21,9 @@ return 0; }
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { - if (rp->power_state->prev_sleep_state != ACPI_S3) + if (!s3resume) google_chromeec_kbbacklight(100);
printk(BIOS_INFO, "MLB: board version %s\n", samus_board_version()); diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c index e1dacba..eb187c2 100644 --- a/src/mainboard/google/jecht/romstage.c +++ b/src/mainboard/google/jecht/romstage.c @@ -10,7 +10,7 @@ #include <superio/ite/it8772f/it8772f.h> #include "onboard.h"
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { if (CONFIG(CHROMEOS)) init_bootmode_straps(); diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c index b8f0c67..53745e6 100644 --- a/src/mainboard/intel/wtm2/romstage.c +++ b/src/mainboard/intel/wtm2/romstage.c @@ -6,6 +6,6 @@ #include <soc/intel/broadwell/pei_wrapper.h> #include <soc/intel/broadwell/romstage.h>
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { } diff --git a/src/mainboard/purism/librem_bdw/romstage.c b/src/mainboard/purism/librem_bdw/romstage.c index 2395ed6..34aaf00 100644 --- a/src/mainboard/purism/librem_bdw/romstage.c +++ b/src/mainboard/purism/librem_bdw/romstage.c @@ -4,6 +4,6 @@ #include <soc/intel/broadwell/pei_wrapper.h> #include <soc/intel/broadwell/romstage.h>
-void mainboard_post_raminit(struct romstage_params *rp) +void mainboard_post_raminit(const int s3resume) { } diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c index ce77159..73afc15 100644 --- a/src/soc/intel/broadwell/romstage.c +++ b/src/soc/intel/broadwell/romstage.c @@ -34,7 +34,9 @@ /* Get power state */ rp.power_state = fill_power_state();
- elog_boot_notify(rp.power_state->prev_sleep_state == ACPI_S3); + const int s3resume = rp.power_state->prev_sleep_state == ACPI_S3; + + elog_boot_notify(s3resume);
/* Print useful platform information */ report_platform_info(); @@ -67,7 +69,7 @@
timestamp_add_now(TS_AFTER_INITRAM);
- romstage_handoff_init(rp.power_state->prev_sleep_state == ACPI_S3); + romstage_handoff_init(s3resume);
- mainboard_post_raminit(&rp); + mainboard_post_raminit(s3resume); } diff --git a/src/soc/intel/broadwell/romstage.h b/src/soc/intel/broadwell/romstage.h index 0d00acc..f5fda23 100644 --- a/src/soc/intel/broadwell/romstage.h +++ b/src/soc/intel/broadwell/romstage.h @@ -13,7 +13,7 @@ };
void mainboard_pre_raminit(struct pei_data *pei_data); -void mainboard_post_raminit(struct romstage_params *params); +void mainboard_post_raminit(const int s3resume);
void raminit(struct pei_data *pei_data);