Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42849 )
Change subject: ACPI GNVS: replace smm_get_gnvs() with gnvs() ......................................................................
ACPI GNVS: replace smm_get_gnvs() with gnvs()
Change-Id: I7b657750b10f98524f011f5254e533217fe94fd8 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M Documentation/mainboard_io_trap_handler_sample.c M src/mainboard/getac/p470/smihandler.c M src/mainboard/google/auron/smihandler.c M src/mainboard/google/butterfly/mainboard_smi.c M src/mainboard/google/cyan/smihandler.c M src/mainboard/google/glados/smihandler.c M src/mainboard/google/jecht/smihandler.c M src/mainboard/google/link/mainboard_smi.c M src/mainboard/google/parrot/smihandler.c M src/mainboard/google/rambi/mainboard_smi.c M src/mainboard/google/slippy/smihandler.c M src/mainboard/google/stout/mainboard_smi.c M src/mainboard/intel/cannonlake_rvp/smihandler.c M src/mainboard/intel/kblrvp/smihandler.c M src/mainboard/intel/kunimitsu/smihandler.c M src/mainboard/intel/strago/smihandler.c M src/soc/intel/baytrail/smihandler.c M src/soc/intel/braswell/smihandler.c M src/soc/intel/broadwell/smihandler.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/block/smm/smitraphandler.c M src/soc/intel/denverton_ns/smihandler.c M src/southbridge/intel/bd82x6x/smihandler.c M src/southbridge/intel/i82801dx/smihandler.c M src/southbridge/intel/i82801gx/smihandler.c M src/southbridge/intel/i82801ix/smihandler.c M src/southbridge/intel/i82801jx/smihandler.c M src/southbridge/intel/ibexpeak/smihandler.c M src/southbridge/intel/lynxpoint/smihandler.c 29 files changed, 98 insertions(+), 103 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/42849/1
diff --git a/Documentation/mainboard_io_trap_handler_sample.c b/Documentation/mainboard_io_trap_handler_sample.c index 558e12f..78c3c69 100644 --- a/Documentation/mainboard_io_trap_handler_sample.c +++ b/Documentation/mainboard_io_trap_handler_sample.c @@ -20,7 +20,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; @@ -32,6 +32,6 @@ * For now, we force the return value to 0 and log all traps to * see what's going on. */ - //smm_get_gnvs()->smif = 0; + //gnvs()->smif = 0; return 1; } diff --git a/src/mainboard/getac/p470/smihandler.c b/src/mainboard/getac/p470/smihandler.c index 145c942..d0c5f6d 100644 --- a/src/mainboard/getac/p470/smihandler.c +++ b/src/mainboard/getac/p470/smihandler.c @@ -11,11 +11,6 @@
#define MAX_LCD_BRIGHTNESS 0xd8
-/* The southbridge SMI handler checks whether gnvs has a - * valid pointer before calling the trap handler - */ -extern struct global_nvs *gnvs; - int mainboard_io_trap_handler(int smif) { u8 reg8; @@ -64,7 +59,7 @@ break; case 0xd5: printk(BIOS_DEBUG, "Set Brightness\n"); - reg8 = gnvs->brtl; + reg8 = gnvs()->brtl; printk(BIOS_DEBUG, "brtl: %x\n", reg8); ec_write(0x17, reg8); break; @@ -72,7 +67,7 @@ printk(BIOS_DEBUG, "Get Brightness\n"); reg8 = ec_read(0x17); printk(BIOS_DEBUG, "brtl: %x\n", reg8); - gnvs->brtl = reg8; + gnvs()->brtl = reg8; break; case 0xd7: printk(BIOS_DEBUG, "Get ECO mode status\n"); @@ -124,11 +119,11 @@ return 0; }
- /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; }
diff --git a/src/mainboard/google/auron/smihandler.c b/src/mainboard/google/auron/smihandler.c index 16565af..56efc62 100644 --- a/src/mainboard/google/auron/smihandler.c +++ b/src/mainboard/google/auron/smihandler.c @@ -66,7 +66,7 @@ /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) { + if (gnvs()->s3u0 == 0) { google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); google_chromeec_set_usb_charge_mode( @@ -79,7 +79,7 @@ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) { + if (gnvs()->s5u0 == 0) { google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); google_chromeec_set_usb_charge_mode( diff --git a/src/mainboard/google/butterfly/mainboard_smi.c b/src/mainboard/google/butterfly/mainboard_smi.c index 4d5bc4f..1c19894d 100644 --- a/src/mainboard/google/butterfly/mainboard_smi.c +++ b/src/mainboard/google/butterfly/mainboard_smi.c @@ -23,7 +23,7 @@ printk(BIOS_DEBUG, "mainboard_smi_sleep: %x\n", slp_typ);
/* Tell the EC to Enable USB power for S3 if requested */ - if (smm_get_gnvs()->s3u0 != 0 || smm_get_gnvs()->s3u1 != 0) + if (gnvs()->s3u0 != 0 || gnvs()->s3u1 != 0) ec_mem_write(EC_EC_PSW, ec_mem_read(EC_EC_PSW) | EC_PSW_USB);
/* Disable wake on USB, LAN & RTC */ diff --git a/src/mainboard/google/cyan/smihandler.c b/src/mainboard/google/cyan/smihandler.c index 90d5717..71c5b69 100644 --- a/src/mainboard/google/cyan/smihandler.c +++ b/src/mainboard/google/cyan/smihandler.c @@ -25,7 +25,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; @@ -38,7 +38,7 @@ * For now, we force the return value to 0 and log all traps to * see what's going on. */ - //gnvs->smif = 0; + //gnvs()->smif = 0; return 1; }
@@ -87,10 +87,10 @@ /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs()->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs()->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
@@ -100,10 +100,10 @@ enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs()->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs()->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
diff --git a/src/mainboard/google/glados/smihandler.c b/src/mainboard/google/glados/smihandler.c index 1446321..ab1d3ec 100644 --- a/src/mainboard/google/glados/smihandler.c +++ b/src/mainboard/google/glados/smihandler.c @@ -19,7 +19,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c index 3a63b39..b811505 100644 --- a/src/mainboard/google/jecht/smihandler.c +++ b/src/mainboard/google/jecht/smihandler.c @@ -16,7 +16,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c index e60ceae..1a59f1e 100644 --- a/src/mainboard/google/link/mainboard_smi.c +++ b/src/mainboard/google/link/mainboard_smi.c @@ -49,18 +49,18 @@ /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs()->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs()->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs()->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs()->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); break; diff --git a/src/mainboard/google/parrot/smihandler.c b/src/mainboard/google/parrot/smihandler.c index c179aee..c02d713 100644 --- a/src/mainboard/google/parrot/smihandler.c +++ b/src/mainboard/google/parrot/smihandler.c @@ -63,7 +63,7 @@
/* Tell the EC to Disable USB power */ - if (smm_get_gnvs()->s3u0 == 0 && smm_get_gnvs()->s3u1 == 0) { + if (gnvs()->s3u0 == 0 && gnvs()->s3u1 == 0) { ec_kbc_write_cmd(0x45); ec_kbc_write_ib(0xF2); } diff --git a/src/mainboard/google/rambi/mainboard_smi.c b/src/mainboard/google/rambi/mainboard_smi.c index e6e40aa..96d5bee 100644 --- a/src/mainboard/google/rambi/mainboard_smi.c +++ b/src/mainboard/google/rambi/mainboard_smi.c @@ -55,10 +55,10 @@ /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs()->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs()->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
@@ -68,10 +68,10 @@ enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs()->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs()->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
diff --git a/src/mainboard/google/slippy/smihandler.c b/src/mainboard/google/slippy/smihandler.c index 346866f..ec68686 100644 --- a/src/mainboard/google/slippy/smihandler.c +++ b/src/mainboard/google/slippy/smihandler.c @@ -60,10 +60,10 @@ /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs()->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs()->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
@@ -78,10 +78,10 @@ break; case ACPI_S4: case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs()->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs()->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c index 0b6b227..a4af7ca 100644 --- a/src/mainboard/google/stout/mainboard_smi.c +++ b/src/mainboard/google/stout/mainboard_smi.c @@ -49,7 +49,7 @@ * charge smart phone. * 1/1 USB on, yellow port in AUTO mode and didn't support wake up system. */ - if (smm_get_gnvs()->s3u0 != 0 || smm_get_gnvs()->s3u1 != 0) { + if (gnvs()->s3u0 != 0 || gnvs()->s3u1 != 0) { ec_write(EC_PERIPH_CNTL_3, ec_read(EC_PERIPH_CNTL_3) | 0x00); ec_write(EC_USB_S3_EN, ec_read(EC_USB_S3_EN) | 0x01); printk(BIOS_DEBUG, "USB wake from S3 enabled.\n"); @@ -59,7 +59,7 @@ * the XHCI PME to prevent wake when the port power is cut * after the transition into suspend. */ - if (smm_get_gnvs()->xhci) { + if (gnvs()->xhci) { u32 reg32 = pci_read_config32(PCH_XHCI_DEV, 0x74); reg32 &= ~(1 << 8); /* disable PME */ reg32 |= (1 << 15); /* clear PME status */ diff --git a/src/mainboard/intel/cannonlake_rvp/smihandler.c b/src/mainboard/intel/cannonlake_rvp/smihandler.c index 682c33d..391ec7d 100644 --- a/src/mainboard/intel/cannonlake_rvp/smihandler.c +++ b/src/mainboard/intel/cannonlake_rvp/smihandler.c @@ -12,7 +12,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; diff --git a/src/mainboard/intel/kblrvp/smihandler.c b/src/mainboard/intel/kblrvp/smihandler.c index 97f5c43..b2998c0 100644 --- a/src/mainboard/intel/kblrvp/smihandler.c +++ b/src/mainboard/intel/kblrvp/smihandler.c @@ -16,7 +16,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; diff --git a/src/mainboard/intel/kunimitsu/smihandler.c b/src/mainboard/intel/kunimitsu/smihandler.c index 27f8c4f..e813183 100644 --- a/src/mainboard/intel/kunimitsu/smihandler.c +++ b/src/mainboard/intel/kunimitsu/smihandler.c @@ -17,7 +17,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; diff --git a/src/mainboard/intel/strago/smihandler.c b/src/mainboard/intel/strago/smihandler.c index 703876c..82bc588 100644 --- a/src/mainboard/intel/strago/smihandler.c +++ b/src/mainboard/intel/strago/smihandler.c @@ -24,7 +24,7 @@ switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs()->smif = 0; break; default: return 0; @@ -37,7 +37,7 @@ * For now, we force the return value to 0 and log all traps to * see what's going on. */ - //gnvs->smif = 0; + //gnvs()->smif = 0; return 1; }
@@ -83,10 +83,10 @@ /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs()->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs()->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
@@ -96,10 +96,10 @@ enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs()->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs()->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED);
diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 30ab2b1..ce44f8f 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -28,11 +28,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -45,7 +45,7 @@ enable_smi(EOS); }
-struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } @@ -228,7 +228,7 @@ u32 reg32;
/* LPE Device */ - if (gnvs->dev.lpe_en) { + if (gnvs()->dev.lpe_en) { reg32 = iosf_port58_read(LPE_PCICFGCTR1); reg32 &= ~(LPE_PCICFGCTR1_PCI_CFG_DIS | LPE_PCICFGCTR1_ACPI_INT_EN); @@ -237,7 +237,7 @@
/* SCC Devices */ #define SCC_ACPI_MODE_DISABLE(name_) \ - do { if (gnvs->dev.scc_en[SCC_NVS_ ## name_]) { \ + do { if (gnvs()->dev.scc_en[SCC_NVS_ ## name_]) { \ reg32 = iosf_scc_read(SCC_ ## name_ ## _CTL); \ reg32 &= ~(SCC_CTL_PCI_CFG_DIS | SCC_CTL_ACPI_INT_EN); \ iosf_scc_write(SCC_ ## name_ ## _CTL, reg32); \ @@ -249,7 +249,7 @@
/* LPSS Devices */ #define LPSS_ACPI_MODE_DISABLE(name_) \ - do { if (gnvs->dev.lpss_en[LPSS_NVS_ ## name_]) { \ + do { if (gnvs()->dev.lpss_en[LPSS_NVS_ ## name_]) { \ reg32 = iosf_lpss_read(LPSS_ ## name_ ## _CTL); \ reg32 &= ~LPSS_CTL_PCI_CFG_DIS | ~LPSS_CTL_ACPI_INT_EN; \ iosf_lpss_write(LPSS_ ## name_ ## _CTL, reg32); \ diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c index 12f5347..d3883e1 100644 --- a/src/soc/intel/braswell/smihandler.c +++ b/src/soc/intel/braswell/smihandler.c @@ -29,11 +29,11 @@ case 0x32: printk(BIOS_DEBUG, "OS Init\n"); /* - * gnvs->smif: + * gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -46,7 +46,7 @@ enable_smi(EOS); }
-struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c index 59b4178..cb0c49d 100644 --- a/src/soc/intel/broadwell/smihandler.c +++ b/src/soc/intel/broadwell/smihandler.c @@ -31,7 +31,7 @@ * by coreboot. */ static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } @@ -41,11 +41,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -471,8 +471,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs() && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index e181875..b28f61f 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -126,7 +126,7 @@ pmc_enable_smi(EOS); }
-struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } @@ -211,7 +211,7 @@ case ACPI_S3: printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n");
- gnvs->uior = uart_is_controller_initialized(); + gnvs()->uior = uart_is_controller_initialized();
/* Invalidate the cache before going to S3 */ wbinvd(); diff --git a/src/soc/intel/common/block/smm/smitraphandler.c b/src/soc/intel/common/block/smm/smitraphandler.c index 8af9046..69efc60 100644 --- a/src/soc/intel/common/block/smm/smitraphandler.c +++ b/src/soc/intel/common/block/smm/smitraphandler.c @@ -25,16 +25,16 @@ /* Inherited from cpu/x86/smm.h resulting in a different signature */ int southbridge_io_trap_handler(int smif) { - struct global_nvs *gnvs = smm_get_gnvs(); + struct global_nvs *gnvs = gnvs(); switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); /* - * gnvs->smif: + * gnvs()->smif: * - On success, the IO Trap Handler returns 0 * - On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -62,7 +62,7 @@ u32 data, mask = 0; u8 trap_sts; int i; - struct global_nvs *gnvs = smm_get_gnvs(); + struct global_nvs *gnvs = gnvs();
/* TRSR - Trap Status Register */ trap_sts = pcr_read8(PID_PSTH, PCR_PSTH_TRPST); @@ -78,8 +78,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); + if (gnvs() && gnvs()->smif) + io_trap_handler(gnvs()->smif); return; }
diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c index 2f5d92a..d777f58 100644 --- a/src/soc/intel/denverton_ns/smihandler.c +++ b/src/soc/intel/denverton_ns/smihandler.c @@ -26,11 +26,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -40,7 +40,7 @@
void southbridge_smi_set_eos(void) { enable_smi(EOS); }
-struct global_nvs *smm_get_gnvs(void) { return gnvs; } +struct global_nvs *gnvs(void) { return gnvs; }
static void busmaster_disable_on_bus(int bus) { diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index 9dad4fc..404b3ee 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -19,7 +19,7 @@ #include "nvs.h"
static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } @@ -29,11 +29,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -150,8 +150,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs() && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
@@ -187,7 +187,7 @@
void southbridge_smm_xhci_sleep(u8 slp_type) { - if (smm_get_gnvs()->xhci) + if (gnvs()->xhci) xhci_sleep(slp_type); }
diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c index 7cd5c70..f85c4f2 100644 --- a/src/southbridge/intel/i82801dx/smihandler.c +++ b/src/southbridge/intel/i82801dx/smihandler.c @@ -193,11 +193,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -502,8 +502,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 1757872..c085141 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -35,11 +35,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -66,8 +66,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 070b7a6..f0ec1b4 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -21,11 +21,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -60,8 +60,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c index af242aa..44a7a98 100644 --- a/src/southbridge/intel/i82801jx/smihandler.c +++ b/src/southbridge/intel/i82801jx/smihandler.c @@ -27,11 +27,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -66,8 +66,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index f3a80d9..229d4c7 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -28,7 +28,7 @@ * by coreboot. */ static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } @@ -38,11 +38,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -120,8 +120,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs() && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 4621c85..0998314 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -26,7 +26,7 @@ * by coreboot. */ static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) +struct global_nvs *gnvs(void) { return gnvs; } @@ -36,11 +36,11 @@ switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); - /* gnvs->smif: + /* gnvs()->smif: * On success, the IO Trap Handler returns 0 * On failure, the IO Trap Handler returns a value != 0 */ - gnvs->smif = 0; + gnvs()->smif = 0; return 1; /* IO trap handled */ }
@@ -456,8 +456,8 @@
/* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) - io_trap_handler(gnvs->smif); // call function smif + if (gnvs() && gnvs()->smif) + io_trap_handler(gnvs()->smif); // call function smif return; }