Attention is currently required from: Krystian Hebel, Michał Żygowski, Nico Huber, Piotr Król.
Felix Held has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/79612?usp=email )
Change subject: mb/pcengines/apu2/mainboard: fix up ECC scrubber configuration ......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8:
Which version of AGESA binary (version, hash, source) are you testing with?
i think i just used what's in the blob repo and iirc that also matched what i pulled form a pre-built binary; don't remember changing any config for that, so should just be the default one in upstream coreboot. would need to re-check to say for sure though. if you're using some other agesa binary, try applying this patch, or just use the prebuilt image that's built from the repo/branch this patch is based on, and then check the dram ecc enable bit 22 in D18F3x44. if that bit is 0, the dram won't be using ecc. i'd expect that bit being written long before fixup_dram_ecc_scrubber is called. just had a look and the public bkdg says in the description of the DramEccEn bit in D18F3x44 MCA NB Configuration "This bit does not affect ECC checking in the northbridge arrays.". since the northbridge arrays seem to be where the error injection is done, i wonder if just having the error injection working doesn't imply that the dram controller is using ecc on the dram interface. but yeah, i don't know for sure how the error injection is working exactly, but the DramEccEn bit not being set should be a rather clear indicator of ecc not being used in the dram controller