Patrick Georgi (patrick@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5765
-gerrit
commit af99fab23f2ade13622bc3d2f486a715c2879aef Author: Patrick Georgi patrick@georgi-clan.de Date: Sat May 17 14:00:12 2014 +0200
build: separate CPPFLAGS from CFLAGS
There are a couple of places where CPPFLAGS are pasted into CFLAGS, eliminate them.
Change-Id: Ic7f568cf87a7d9c5c52e2942032a867161036bd7 Signed-off-by: Patrick Georgi patrick@georgi-clan.de --- Makefile | 2 +- Makefile.inc | 16 ++++++++-------- src/arch/armv7/Makefile.inc | 4 ++-- src/arch/x86/Makefile.inc | 2 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/drivers/intel/fsp/Makefile.inc | 2 +- src/northbridge/intel/fsp_sandybridge/Makefile.inc | 2 +- src/soc/intel/baytrail/Makefile.inc | 2 +- src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 +- src/vendorcode/google/chromeos/Makefile.inc | 2 +- toolchain.inc | 4 ++-- 11 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/Makefile b/Makefile index c9648c0..3404a51 100644 --- a/Makefile +++ b/Makefile @@ -242,7 +242,7 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC_$(1)) $(3) -MMD $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$< + $(CC_$(1)) $(3) -MMD $$$$(CPPFLAGS_$(1)) $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef diff --git a/Makefile.inc b/Makefile.inc index d76fab9..9e4c6b0 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -152,7 +152,7 @@ $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$@).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$@)).asl mv $$(basename $$@).hex $$(basename $$@).c - $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$@).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(CPPFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$@).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$@).c $$(basename $$@).hex endef @@ -214,11 +214,11 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif
-CPPFLAGS := -Isrc -Isrc/include -I$(obj) -CPPFLAGS += -Isrc/device/oprom/include -CPPFLAGS += -include $(src)/include/kconfig.h +CPPFLAGS_common := -Isrc -Isrc/include -I$(obj) +CPPFLAGS_common += -Isrc/device/oprom/include +CPPFLAGS_common += -include $(src)/include/kconfig.h
-CFLAGS_common = $(CPPFLAGS) -Os -pipe -g -nostdinc +CFLAGS_common = -Os -pipe -g -nostdinc CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs CFLAGS_common += -Wstrict-aliasing -Wshadow @@ -314,15 +314,15 @@ $(objutil)/%.o: $(objutil)/%.c
$(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -c -o $@ $<
$(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) $(CPPFLAGS_romstage) -c -o $@ $<
$(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -c -o $@ $<
####################################################################### # Clean up rules diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 23e0bf6..402c491 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -155,7 +155,7 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
endif # CONFIG_ARCH_ROMSTAGE_ARMV7
@@ -192,7 +192,7 @@ $(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ram ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) $(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif
ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6ff059c..30f9243 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -193,7 +193,7 @@ else
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 8345002..c6d7339 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -9,6 +9,6 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),) ifneq ($(wildcard $(shell realpath -L "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),) -CPPFLAGS += -I$(CONFIG_MICROCODE_INCLUDE_PATH) +CPPFLAGS_common += -I$(CONFIG_MICROCODE_INCLUDE_PATH) endif endif diff --git a/src/drivers/intel/fsp/Makefile.inc b/src/drivers/intel/fsp/Makefile.inc index 86c3a85..280f7b9 100644 --- a/src/drivers/intel/fsp/Makefile.inc +++ b/src/drivers/intel/fsp/Makefile.inc @@ -22,7 +22,7 @@ romstage-y += fsp_util.c ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
-CPPFLAGS += -Isrc/drivers/intel/fsp +CPPFLAGS_common += -Isrc/drivers/intel/fsp
ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y) cpu_incs += $(src)/drivers/intel/fsp/cache_as_ram.inc diff --git a/src/northbridge/intel/fsp_sandybridge/Makefile.inc b/src/northbridge/intel/fsp_sandybridge/Makefile.inc index 952c008..a229119 100644 --- a/src/northbridge/intel/fsp_sandybridge/Makefile.inc +++ b/src/northbridge/intel/fsp_sandybridge/Makefile.inc @@ -32,6 +32,6 @@ romstage-y += ../../../arch/x86/lib/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
-CPPFLAGS += -I$(src)/northbridge/intel/fsp_sandybridge/fsp +CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_sandybridge/fsp
$(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 179f2a6..d4f653e 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -53,7 +53,7 @@ ramstage-$(CONFIG_ELOG) += elog.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c
-CPPFLAGS += -Isrc/soc/intel/baytrail/ +CPPFLAGS_common += -Isrc/soc/intel/baytrail/
# Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index fdb0431..208611b 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -70,4 +70,4 @@ endif
PHONY += bd82x6x_add_me
-CPPFLAGS += -I$(src)/southbridge/intel/fsp_bd82x6x +CPPFLAGS_common += -I$(src)/southbridge/intel/fsp_bd82x6x diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index f0289f8..80a0da9 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -48,7 +48,7 @@ VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y)) VB_SOURCE := vboot_reference
# Add the vboot include paths. -CPPFLAGS += -I$(VB_SOURCE)/firmware/include +CPPFLAGS_common += -I$(VB_SOURCE)/firmware/include
VBOOT_STUB_ELF = $(obj)/vendorcode/google/chromeos/vbootstub.elf VBOOT_STUB = $(VBOOT_STUB_ELF).rmod diff --git a/toolchain.inc b/toolchain.inc index ea67ad4..dca00fc 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -64,8 +64,8 @@ OBJCOPY_$(1) := $(OBJCOPY_$(2)) OBJDUMP_$(1) := $(OBJDUMP_$(2)) STRIP_$(1) := $(STRIP_$(2)) READELF_$(1) := $(READELF_$(2)) -CPPFLAGS_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include -CFLAGS_$(1) = $$(CFLAGS_common) $$(CPPFLAGS_$(1)) $(CFLAGS_$(2)) +CFLAGS_$(1) = $$(CFLAGS_common) $$(CFLAGS_$(2)) +CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2)) LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \ $(CC_$(2)) -print-libgcc-file-name) endef