Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50722 )
Change subject: soc/intel/xeon_sp/smmrelocate: Don't run twice on the BSP ......................................................................
soc/intel/xeon_sp/smmrelocate: Don't run twice on the BSP
This only makes sense if relocation via MSR is possible, to relocate APs in parallel. xeon_sp hardware does not support these MSR.
TESTED: ocp/deltalake boots fine. SMM is relocated on CPU 0 just like all other cores.
Change-Id: Ic45e6985093b8c9a1cee13c87bc0f09c77aaa0d2 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/50722 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/xeon_sp/cpx/cpu.c M src/soc/intel/xeon_sp/skx/cpu.c M src/soc/intel/xeon_sp/smmrelocate.c 3 files changed, 2 insertions(+), 17 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c index be01fc0..b3ab236 100644 --- a/src/soc/intel/xeon_sp/cpx/cpu.c +++ b/src/soc/intel/xeon_sp/cpx/cpu.c @@ -183,7 +183,7 @@ .pre_mp_init = pre_mp_init, .get_cpu_count = get_thread_count, .get_smm_info = get_smm_info, - .pre_mp_smm_init = smm_initialize, + .pre_mp_smm_init = smm_southbridge_clear_state, .relocation_handler = smm_relocation_handler, .get_microcode_info = get_microcode_info, .post_mp_init = post_mp_init, diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c index f9cd356..848c907 100644 --- a/src/soc/intel/xeon_sp/skx/cpu.c +++ b/src/soc/intel/xeon_sp/skx/cpu.c @@ -217,7 +217,7 @@ .pre_mp_init = pre_mp_init, .get_cpu_count = get_platform_thread_count, .get_smm_info = get_smm_info, - .pre_mp_smm_init = smm_initialize, + .pre_mp_smm_init = smm_southbridge_clear_state, .relocation_handler = smm_relocation_handler, .post_mp_init = post_mp_init, }; diff --git a/src/soc/intel/xeon_sp/smmrelocate.c b/src/soc/intel/xeon_sp/smmrelocate.c index a71a740..dc4b511 100644 --- a/src/soc/intel/xeon_sp/smmrelocate.c +++ b/src/soc/intel/xeon_sp/smmrelocate.c @@ -127,18 +127,3 @@ if (mtrr_cap.lo & SMRR_SUPPORTED) write_smrr(relo_params); } - -void smm_initialize(void) -{ - /* Clear the SMM state in the southbridge. */ - smm_southbridge_clear_state(); - /* Run the relocation handler for on the BSP . */ - smm_initiate_relocation(); -} - -void smm_relocate(void) -{ - /* Save states via MSR does not seem to be supported on CPX */ - if (!boot_cpu()) - smm_initiate_relocation(); -}