James has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31065
Change subject: mb/lenovo/x131e: remove PMH7 ......................................................................
mb/lenovo/x131e: remove PMH7
This board does not have PMH7.
Change-Id: I382958f012e5f4445efc76c7f36bbdf460c29be4 Signed-off-by: James Ye jye836@gmail.com --- M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x131e/devicetree.cb 2 files changed, 1 insertion(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/31065/1
diff --git a/src/mainboard/lenovo/x131e/Kconfig b/src/mainboard/lenovo/x131e/Kconfig index 2a58020..946b945 100644 --- a/src/mainboard/lenovo/x131e/Kconfig +++ b/src/mainboard/lenovo/x131e/Kconfig @@ -7,7 +7,6 @@ select NORTHBRIDGE_INTEL_SANDYBRIDGE select USE_NATIVE_RAMINIT select SOUTHBRIDGE_INTEL_C216 - select EC_LENOVO_PMH7 select EC_LENOVO_H8 select NO_UART_ON_SUPERIO select BOARD_ROMSIZE_KB_12288 diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb index ccdff7c..4adc94b 100644 --- a/src/mainboard/lenovo/x131e/devicetree.cb +++ b/src/mainboard/lenovo/x131e/devicetree.cb @@ -92,18 +92,12 @@ device pci 1d.0 on end # USB2 EHCI #1 device pci 1e.0 off end # PCI bridge device pci 1f.0 on # LPC bridge PCI-LPC bridge - chip ec/lenovo/pmh7 - register "backlight_enable" = "0x01" - register "dock_event_enable" = "0x00" - device pnp ff.1 on end # dummy - end - chip drivers/pc80/tpm device pnp 0c31.0 on end end
chip ec/lenovo/h8 - device pnp ff.2 on # dummy + device pnp ff.1 on # dummy io 0x60 = 0x62 io 0x62 = 0x66 io 0x64 = 0x1600