Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35744 )
Change subject: nb/intel/nehalem: Disable PEG and IGD based on devicetree ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35744/4/src/northbridge/intel/nehal... File src/northbridge/intel/nehalem/northbridge.c:
https://review.coreboot.org/c/coreboot/+/35744/4/src/northbridge/intel/nehal... PS4, Line 247: pci_write_config32(dev, D0F0_DEVEN, reg);
I don't like read-modify-write split like this for register D0F0_DEVEN, and having to re-initialise dev. I assume for this hardware there is no write-once registers involved?
"All the bits in this register are Intel TXT Lockable." We don't seem to do that at the moment, but I don't like disabling/hiding devices after the resource allocation has been done. I think moving this before the raminit might be appropriate? Early ramstage like gm45 does it, is also an option.