[coreboot-gerrit] Change in ...libgfxinit[master]: gma config: Group mutable state into a record

[Nico Huber (Code Review)]

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/libgfxinit/+/27065 )

Change subject: gma config: Group mutable state into a record
......................................................................

gma config: Group mutable state into a record

Put all state into a record, `Config.Variable`, so it can be referenced
at once from other packages. This is required to add stateful variables
to `Config` without changing the rest of the codebase.

Change-Id: Iffc7984b61e57cda7bdaf3b915a4fc51b396423a
Signed-off-by: Nico Huber 
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/27065
Reviewed-by: Arthur Heymans 
---
M common/hw-gfx-gma-config.ads.template
M common/hw-gfx-gma-dp_aux_request.adb
M common/hw-gfx-gma.adb
3 files changed, 23 insertions(+), 14 deletions(-)

Approvals:
  Nico Huber: Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 6033dc0..ea42443 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -14,7 +14,7 @@

private package HW.GFX.GMA.Config
 with
-   Initializes => (Valid_Port, Raw_Clock)
+   Initializes => Variable
 is

Gen : constant Generation := <<GEN>>;
@@ -58,6 +58,23 @@

----------------------------------------------------------------------------

+   type Valid_Port_Array is array (Port_Type) of Boolean;
+   type Variable_Config is record
+      Valid_Port     : Valid_Port_Array;
+      Raw_Clock      : Frequency_Type;
+   end record;
+
+   Variable : Variable_Config :=
+     (Valid_Port     => (others => False),
+      Raw_Clock      => Frequency_Type'First)
+   with
+      Part_Of => GMA.Config_State;
+
+   Valid_Port  : Valid_Port_Array renames Variable.Valid_Port;
+   Raw_Clock   : Frequency_Type renames Variable.Raw_Clock;
+
+   ----------------------------------------------------------------------------
+
    Gen_G45           : constant Boolean := Gen = G45;
    Gen_Ironlake      : constant Boolean := Gen = Ironlake;
    Gen_Haswell       : constant Boolean := Gen = Haswell;
@@ -187,10 +204,6 @@
    Max_Pipe : constant Pipe_Index :=
      (if Has_Tertiary_Pipe then Tertiary else Secondary);

-   Valid_Port : array (Port_Type) of Boolean := (others => False)
-   with
-      Part_Of => GMA.Config_State;
-
    Last_Digital_Port : constant Digital_Port :=
      (if Has_DDI_E then DIGI_E else DIGI_C);

@@ -239,9 +252,6 @@
       elsif Gen_Skylake    then 24_000_000
                            else Frequency_Type'First);

-    Raw_Clock : Frequency_Type := Default_RawClk_Freq
-    with Part_Of => GMA.Config_State;
-
    ----------------------------------------------------------------------------

-- Maximum source width with enabled scaler. This only accounts
diff --git a/common/hw-gfx-gma-dp_aux_request.adb b/common/hw-gfx-gma-dp_aux_request.adb
index 75a2cca..c057059 100644
--- a/common/hw-gfx-gma-dp_aux_request.adb
+++ b/common/hw-gfx-gma-dp_aux_request.adb
@@ -163,7 +163,7 @@
       Success           :    out Boolean)
    with
       Global => (In_Out => Registers.Register_State,
-                 Input  => (Time.State, Config.Raw_Clock)),
+                 Input  => (Time.State, Config.Variable)),
       Depends =>
         ((Registers.Register_State,
           Response,
@@ -171,7 +171,7 @@
           Success)
              =>
                (Registers.Register_State,
-                Config.Raw_Clock,
+                Config.Variable,
                 Time.State,
                 Port,
                 Request,
diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb
index dfe986f..b62ebce 100644
--- a/common/hw-gfx-gma.adb
+++ b/common/hw-gfx-gma.adb
@@ -44,7 +44,7 @@
          HPD_Delay, Wait_For_HPD,
          Linear_FB_Base),
       Init_State => Initialized,
-      Config_State => (Config.Valid_Port, Config.Raw_Clock),
+      Config_State => (Config.Variable),
       Device_State =>
         (Dev.PCI_State, Registers.Register_State, Registers.GTT_State))
 is
@@ -371,9 +371,8 @@
    with
       Refined_Global =>
         (In_Out =>
-           (Config.Valid_Port, Dev.PCI_State,
-            Registers.Register_State, Port_IO.State,
-            Config.Raw_Clock),
+           (Config.Variable, Dev.PCI_State,
+            Registers.Register_State, Port_IO.State),
          Input =>
            (Time.State),
          Output =>