Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59562 )
Change subject: soc/intel/alderlake: Modify SOC_INTEL_ALDERLAKE_DEBUG_CONSENT default value ......................................................................
soc/intel/alderlake: Modify SOC_INTEL_ALDERLAKE_DEBUG_CONSENT default value
On ADL, we actually use debug consent 2 for soc debug by DBC
Change-Id: Ie6fbf3cdcf5dcd1a11a895ea83f55157a2ac4eb9 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 3 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/59562/1
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 58b9051..959ce9c 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -288,7 +288,7 @@ int "Debug Consent for ADL" # USB DBC is more common for developers so make this default to 3 if # SOC_INTEL_DEBUG_CONSENT=y - default 3 if SOC_INTEL_DEBUG_CONSENT + default 2 if SOC_INTEL_DEBUG_CONSENT default 0 help This is to control debug interface on SOC. @@ -296,9 +296,8 @@ PlatformDebugConsent in FspmUpd.h has the details.
Desired platform debug type are - 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), - 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), - 6:Enable (2-wire DCI OOB), 7:Manual + 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power), + 7:Manual
config DATA_BUS_WIDTH int