Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40525 )
Change subject: soc/mediatek/mt8183: Use term settings for high DRAM frequency
......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40525/7/src/soc/mediatek/mt8183/dra...
File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/40525/7/src/soc/mediatek/mt8183/dra...
PS7, Line 272: if (fsp == FSP_0) {
: mr->MR13Value &= ~(1 << 6);
: mr->MR13Value &= 0x7f;
: } else {
: mr->MR13Value |= (1 << 6);
: mr->MR13Value |= 0x80;
: }
MR13Value is a global value need dynamic update between FSP0 and FSP1, can't pre-init at dramc_mode_ […]
Hi huayang, dramc_mode_reg_init already has a operate_fsp, isn't that the value you're looking for?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ie7680b1bf0c29c946d18e3b27626ce6f31c4216b
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