Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30711
Change subject: mb/{ga-g41m-es2l,d954gclf,rk886ex}: Fix devicetree ......................................................................
mb/{ga-g41m-es2l,d954gclf,rk886ex}: Fix devicetree
The devicetree was synced incorrectly with respect to the function disable register set in romstage.
Change-Id: I189c5fdc433b5577ae008abf42878cdc6e3f2d52 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb M src/mainboard/intel/d945gclf/devicetree.cb M src/mainboard/roda/rk886ex/devicetree.cb 3 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/30711/1
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index 9f92d2a..05edb27 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -61,7 +61,7 @@ subsystemid 0x1458 0xe000 end end - device pci 1c.2 on end # PCIe 3 + device pci 1c.2 off end # PCIe 3 device pci 1c.3 off end # PCIe 4 device pci 1c.4 off end # PCIe 5 device pci 1c.5 off end # PCIe 6 diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index eaa26ef..90c517f 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -64,7 +64,7 @@ device pci 1d.0 on end # USB UHCI device pci 1d.1 on end # USB UHCI device pci 1d.2 on end # USB UHCI - device pci 1d.3 on end # USB UHCI + device pci 1d.3 off end # USB UHCI device pci 1d.7 on end # USB2 EHCI device pci 1e.0 on end # PCI bridge device pci 1e.2 off end # AC'97 Audio diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index e3bcc5b..ec42766 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -63,7 +63,7 @@ register "ide_enable_secondary" = "0x0" register "sata_ahci" = "0x0"
- device pci 1b.0 on end # High Definition Audio + device pci 1b.0 off end # High Definition Audio device pci 1c.0 on end # PCIe port 1 device pci 1c.1 off end # PCIe port 2 device pci 1c.2 off end # PCIe port 3 @@ -84,7 +84,7 @@ device pci 3.3 off end # smartcard end end # PCI bridge - device pci 1e.2 off end # AC'97 Audio + device pci 1e.2 on end # AC'97 Audio device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge chip superio/smsc/lpc47n227